https://github.com/e-kud updated
https://github.com/llvm/llvm-project/pull/122204
>From c4b07dd5c89ec97a59a3f30edaadbe50422bf87e Mon Sep 17 00:00:00 2001
From: Evgenii Kudriashov <evgenii.kudrias...@intel.com>
Date: Wed, 8 Jan 2025 17:15:29 -0800
Subject: [PATCH 1/2] [Headers][X86] amxintrin.h - fix attributes according to
SDM
tileloadd, tileloaddtr1 and tilestored are part of amx-tile feature.
---
clang/lib/Headers/amxintrin.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/lib/Headers/amxintrin.h b/clang/lib/Headers/amxintrin.h
index b0140615677f27..a7da10d9951e7e 100644
--- a/clang/lib/Headers/amxintrin.h
+++ b/clang/lib/Headers/amxintrin.h
@@ -234,7 +234,7 @@ typedef int _tile1024i_1024a
__attribute__((__vector_size__(1024), __aligned__(1024)));
/// This is internal intrinsic. C/C++ user should avoid calling it directly.
-static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
+static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE
_tile_loadd_internal(unsigned short m, unsigned short n, const void *base,
__SIZE_TYPE__ stride) {
return __builtin_ia32_tileloadd64_internal(m, n, base,
@@ -242,7 +242,7 @@ _tile_loadd_internal(unsigned short m, unsigned short n,
const void *base,
}
/// This is internal intrinsic. C/C++ user should avoid calling it directly.
-static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
+static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE
_tile_loaddt1_internal(unsigned short m, unsigned short n, const void *base,
__SIZE_TYPE__ stride) {
return __builtin_ia32_tileloaddt164_internal(m, n, base,
@@ -278,7 +278,7 @@ _tile_dpbuud_internal(unsigned short m, unsigned short n,
unsigned short k,
}
/// This is internal intrinsic. C/C++ user should avoid calling it directly.
-static __inline__ void __DEFAULT_FN_ATTRS_INT8
+static __inline__ void __DEFAULT_FN_ATTRS_TILE
_tile_stored_internal(unsigned short m, unsigned short n, void *base,
__SIZE_TYPE__ stride, _tile1024i tile) {
return __builtin_ia32_tilestored64_internal(m, n, base,
>From 2eadd5751278e4426ae9c2f16a176674d22b4654 Mon Sep 17 00:00:00 2001
From: Evgenii Kudriashov <evgenii.kudrias...@intel.com>
Date: Thu, 9 Jan 2025 16:57:09 -0800
Subject: [PATCH 2/2] Split the amx_api.c to create a regression test
---
clang/test/CodeGen/X86/amx_api.c | 30 -------------------------
clang/test/CodeGen/X86/amx_tile.c | 37 +++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+), 30 deletions(-)
create mode 100644 clang/test/CodeGen/X86/amx_tile.c
diff --git a/clang/test/CodeGen/X86/amx_api.c b/clang/test/CodeGen/X86/amx_api.c
index 5b6d50da27c6de..d770c03eb06d21 100644
--- a/clang/test/CodeGen/X86/amx_api.c
+++ b/clang/test/CodeGen/X86/amx_api.c
@@ -33,22 +33,6 @@ void test_api(int cond, short row, short col) {
__tile_stored(buf, STRIDE, c);
}
-void test_tile_loadd(short row, short col) {
- //CHECK-LABEL: @test_tile_loadd
- //CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
- //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
- __tile1024i a = {row, col};
- __tile_loadd(&a, buf, STRIDE);
-}
-
-void test_tile_stream_loadd(short row, short col) {
- //CHECK-LABEL: @test_tile_stream_loadd
- //CHECK-DAG: call x86_amx @llvm.x86.tileloaddt164.internal
- //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
- __tile1024i a = {row, col};
- __tile_stream_loadd(&a, buf, STRIDE);
-}
-
void test_tile_dpbssd(__tile1024i a, __tile1024i b, __tile1024i c) {
//CHECK-LABEL: @test_tile_dpbssd
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>
{{%.*}})
@@ -81,20 +65,6 @@ void test_tile_dpbuud(__tile1024i a, __tile1024i b,
__tile1024i c) {
__tile_dpbuud(&c, a, b);
}
-void test_tile_stored(__tile1024i c) {
- //CHECK-LABEL: @test_tile_stored
- //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>
{{%.*}})
- //CHECK-DAG: call void @llvm.x86.tilestored64.internal
- __tile_stored(buf, STRIDE, c);
-}
-
-void test_tile_zero(__tile1024i c) {
- //CHECK-LABEL: @test_tile_zero
- //CHECK-DAG: call x86_amx @llvm.x86.tilezero.internal
- //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
- __tile_zero(&c);
-}
-
void test_tile_dpbf16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
//CHECK-LABEL: @test_tile_dpbf16ps
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>
{{%.*}})
diff --git a/clang/test/CodeGen/X86/amx_tile.c
b/clang/test/CodeGen/X86/amx_tile.c
new file mode 100644
index 00000000000000..1c87ae5ba1eaa7
--- /dev/null
+++ b/clang/test/CodeGen/X86/amx_tile.c
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding
-triple=x86_64-unknown-unknown -target-feature +amx-tile \
+// RUN: -emit-llvm -o - -Werror -pedantic | FileCheck %s --check-prefixes=CHECK
+
+#include <immintrin.h>
+
+char buf[1024];
+#define STRIDE 32
+
+void test_tile_loadd(short row, short col) {
+ //CHECK-LABEL: @test_tile_loadd
+ //CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
+ //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
+ __tile1024i a = {row, col};
+ __tile_loadd(&a, buf, STRIDE);
+}
+
+void test_tile_stream_loadd(short row, short col) {
+ //CHECK-LABEL: @test_tile_stream_loadd
+ //CHECK-DAG: call x86_amx @llvm.x86.tileloaddt164.internal
+ //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
+ __tile1024i a = {row, col};
+ __tile_stream_loadd(&a, buf, STRIDE);
+}
+
+void test_tile_stored(__tile1024i c) {
+ //CHECK-LABEL: @test_tile_stored
+ //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>
{{%.*}})
+ //CHECK-DAG: call void @llvm.x86.tilestored64.internal
+ __tile_stored(buf, STRIDE, c);
+}
+
+void test_tile_zero(__tile1024i c) {
+ //CHECK-LABEL: @test_tile_zero
+ //CHECK-DAG: call x86_amx @llvm.x86.tilezero.internal
+ //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx
{{%.*}})
+ __tile_zero(&c);
+}
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