================ @@ -1754,6 +1755,17 @@ static bool interp__builtin_vector_reduce(InterpState &S, CodePtr OpPC, PrimType ElemT = *S.getContext().classify(ElemType); unsigned NumElems = Arg.getNumElems(); + if (ElemType->isRealFloatingType()) { + if (ID != Builtin::BI__builtin_reduce_add && + ID != Builtin::BI__builtin_reduce_mul) + llvm_unreachable("Only reduce_add and reduce_mul are supported for " ---------------- farzonl wrote:
Context the float case was exposed by the changes in SemaChecking.cpp which allowed `reduce_add` and `reduce_mul` to operate on floating point vectors. The remaining reduce builtins `Builtin::BI__builtin_reduce_xor, `Builtin::BI__builtin_reduce_or`, and `Builtin::BI__builtin_reduce_and` are not reachable here because the integer checks in SemaChecking.cpp still apply to them. So yes this branch should be unreachable for all non `reduce_add` and `reduce_mul` reduction cases. https://github.com/llvm/llvm-project/pull/120367 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits