================
@@ -3888,6 +3888,24 @@ let TargetPrefix = "aarch64" in {
llvm_nxv16i1_ty, llvm_nxv16i1_ty,
llvm_nxv16i8_ty, llvm_nxv16i8_ty],
[ImmArg<ArgIndex<0>>, IntrInaccessibleMemOnly, IntrHasSideEffects]>;
+
+ class SME_FP8_ZA_SINGLE_VGx1_Intrinsic
+ : DefaultAttrsIntrinsic<[], [llvm_i32_ty,
+ llvm_nxv16i8_ty,
+ llvm_nxv16i8_ty],
+ [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
+
+ class SME_FP8_ZA_SINGLE_VGx2_Intrinsic
+ : DefaultAttrsIntrinsic<[], [llvm_i32_ty,
+ llvm_nxv16i8_ty, llvm_nxv16i8_ty,
+ llvm_nxv16i8_ty],
+ [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
+
+ class SME_FP8_ZA_SINGLE_VGx4_Intrinsic
+ : DefaultAttrsIntrinsic<[], [llvm_i32_ty,
+ llvm_nxv16i8_ty, llvm_nxv16i8_ty,
llvm_nxv16i8_ty, llvm_nxv16i8_ty,
+ llvm_nxv16i8_ty],
+ [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
----------------
SpencerAbson wrote:
My understanding is that `IntrHasSideEffects` is how we describe the use of the
non-operand `ZA` register - these intrinsics write to `ZA` and also read the
FPMR, so we need to explicitly declare that they have side effects other than
`IntrInaccessibleMemOnly`.
https://github.com/llvm/llvm-project/pull/119568
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