================
@@ -252,9 +252,17 @@ static const char *getLDMOption(const llvm::Triple &T,
const ArgList &Args) {
case llvm::Triple::ppc64le:
return "elf64lppc";
case llvm::Triple::riscv32:
- return "elf32lriscv";
- case llvm::Triple::riscv64:
- return "elf64lriscv";
+ case llvm::Triple::riscv64: {
+ bool IsBigEndian = false;
+ if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
+ options::OPT_mbig_endian))
+ IsBigEndian = A->getOption().matches(options::OPT_mbig_endian);
+
+ if (T.getArch() == llvm::Triple::riscv32)
+ return IsBigEndian ? "elf32briscv" : "elf32lriscv";
+ else
+ return IsBigEndian ? "elf64briscv" : "elf64lriscv";
+ }
----------------
alexrp wrote:
Best as I can tell, this would make RISC-V the only architecture for which
there aren't any `ArchType` members distinguishing little-endian vs big-endian?
That seems like a strange precedent to set.
https://github.com/llvm/llvm-project/pull/117865
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