[clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)

[Ulrich Weigand via cfe-commits]

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@@ -1883,6 +1931,10 @@ void SystemZInstrInfo::getLoadStoreOpcodes(const 
TargetRegisterClass *RC,
   } else if (RC == &SystemZ::FP128BitRegClass) {
     LoadOpcode = SystemZ::LX;
     StoreOpcode = SystemZ::STX;
+  } else if (RC == &SystemZ::FP16BitRegClass ||
+             RC == &SystemZ::VR16BitRegClass) {
+    LoadOpcode = SystemZ::VL16;
----------------
uweigand wrote:

Hmm.  Do these even work on FP16?

https://github.com/llvm/llvm-project/pull/109164
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