================ @@ -86,6 +86,7 @@ let TargetPrefix = "spv" in { def int_spv_dot4add_i8packed : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_spv_dot4add_u8packed : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_spv_wave_active_countbits : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>; + def int_spv_wave_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>; ---------------- Keenuts wrote:
My understanding was `IntrConvergent` prevented optimizations to move this instruction into another control-flow, but could change the order in a given BB/flow, but from the few tests I did, it seems those are not optimized anyway (even dead-stores). So for now let's go with `IntrConvergent` and `IntrNoMem`, and if we have a repro/issue in the future, we'll know for sure. https://github.com/llvm/llvm-project/pull/115902 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits