================
@@ -1920,6 +1923,24 @@ bool SPIRVInstructionSelector::selectSign(Register
ResVReg,
return Result;
}
+bool SPIRVInstructionSelector::selectWaveActiveAnyTrue(Register ResVReg,
+ const SPIRVType
*ResType,
+ MachineInstr &I) const {
+ assert(I.getNumOperands() == 3);
+ assert(I.getOperand(2).isReg());
+
+ // IntTy is used to define the execution scope, set to 3 to denote a
+ // cross-lane interaction equivalent to a SPIR-V subgroup.
+ MachineBasicBlock &BB = *I.getParent();
+ SPIRVType *IntTy = GR.getOrCreateSPIRVIntegerType(32, I, TII);
+
+ return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpGroupNonUniformAny))
+ .addDef(ResVReg)
+ .addUse(GR.getSPIRVTypeID(ResType))
+ .addUse(GR.getOrCreateConstInt(3, I, IntTy, TII))
----------------
inbelic wrote:
I think the enumeration here is defined. You can use `SPIRV::Scope::Subgroup`
instead of `3`.
https://github.com/llvm/llvm-project/pull/115902
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
