================
@@ -1562,7 +1562,9 @@ unsigned
LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
unsigned Opc = Inst.getOpcode();
switch (Opc) {
default:
- if (Opc >= LoongArch::AMADD_D && Opc <= LoongArch::AMXOR_W) {
+ // amcas[_db].{b/h/w/d} didn't need this judgement
+ if ((Opc >= LoongArch::AMADD_B && Opc <= LoongArch::AMAND__DB_W) ||
+ (Opc >= LoongArch::AMMAX_D && Opc <= LoongArch::AMXOR__DB_W)) {
----------------
xen0n wrote:
Ah. This is very prone to breakage as correct operation relies on the order of
insn definitions in the TableGen files.
For now it may be okay to merge as-is, but let me try refactoring this piece of
logic to hopefully make it elegant and future-proof.
https://github.com/llvm/llvm-project/pull/114189
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