https://github.com/SpencerAbson updated
https://github.com/llvm/llvm-project/pull/114293
>From 9798e21e38dfba285550d8c2b1738f08da197e80 Mon Sep 17 00:00:00 2001
From: Spencer Abson <spencer.ab...@arm.com>
Date: Wed, 30 Oct 2024 18:06:15 +0000
Subject: [PATCH 1/2] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2
- Introduce the ammended feature flag for FEAT_SVE_AES, 'sve-aes'
- Make the existing sve2-aes flag as an alias of +sve2+sve-aes
- The exising __ARM_FEATURE_SVE2_AES macro must not be effected by this change,
so an effort
has been made to ensure it is defined when we have supplied target features
+sve-aes and +sve2
by any method.
---
clang/lib/Basic/Targets/AArch64.cpp | 11 +++++--
clang/lib/Basic/Targets/AArch64.h | 2 +-
.../Driver/aarch64-implied-sve-features.c | 11 ++++---
.../print-supported-extensions-aarch64.c | 5 ++--
.../Preprocessor/aarch64-target-features.c | 12 ++++++++
llvm/lib/Target/AArch64/AArch64Features.td | 9 ++++--
.../AArch64/AsmParser/AArch64AsmParser.cpp | 1 +
.../TargetParser/TargetParserTest.cpp | 29 +++++++++++++++----
8 files changed, 61 insertions(+), 19 deletions(-)
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index 3d8de0294d4ba3..6033a0439a99af 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -473,7 +473,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions
&Opts,
if (HasSVE2p1)
Builder.defineMacro("__ARM_FEATURE_SVE2p1", "1");
- if (HasSVE2 && HasSVE2AES)
+ if (HasSVE2 && HasSVEAES)
Builder.defineMacro("__ARM_FEATURE_SVE2_AES", "1");
if (HasSVE2 && HasSVE2BitPerm)
@@ -769,7 +769,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const
{
.Case("f32mm", FPU & SveMode && HasMatmulFP32)
.Case("f64mm", FPU & SveMode && HasMatmulFP64)
.Case("sve2", FPU & SveMode && HasSVE2)
- .Case("sve2-pmull128", FPU & SveMode && HasSVE2AES)
+ .Case("sve2-pmull128", FPU & SveMode && HasSVEAES && HasSVE2)
.Case("sve2-bitperm", FPU & SveMode && HasSVE2BitPerm)
.Case("sve2-sha3", FPU & SveMode && HasSVE2SHA3)
.Case("sve2-sm4", FPU & SveMode && HasSVE2SM4)
@@ -861,12 +861,17 @@ bool
AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasSVE2 = true;
HasSVE2p1 = true;
}
+ if (Feature == "+sve-aes") {
+ FPU |= NeonMode;
+ HasAES = true;
+ HasSVEAES = true;
+ }
if (Feature == "+sve2-aes") {
FPU |= NeonMode;
FPU |= SveMode;
HasFullFP16 = true;
HasSVE2 = true;
- HasSVE2AES = true;
+ HasSVEAES = true;
}
if (Feature == "+sve2-sha3") {
FPU |= NeonMode;
diff --git a/clang/lib/Basic/Targets/AArch64.h
b/clang/lib/Basic/Targets/AArch64.h
index ea3e4015d84265..4c25bdb5bb16df 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -78,7 +78,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public
TargetInfo {
bool HasBFloat16 = false;
bool HasSVE2 = false;
bool HasSVE2p1 = false;
- bool HasSVE2AES = false;
+ bool HasSVEAES = false;
bool HasSVE2SHA3 = false;
bool HasSVE2SM4 = false;
bool HasSVEB16B16 = false;
diff --git a/clang/test/Driver/aarch64-implied-sve-features.c
b/clang/test/Driver/aarch64-implied-sve-features.c
index f04e1a785673b8..5da138a70a8fbf 100644
--- a/clang/test/Driver/aarch64-implied-sve-features.c
+++ b/clang/test/Driver/aarch64-implied-sve-features.c
@@ -36,7 +36,7 @@
// SVE2-BITPERM-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "-sve2-bitperm"
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes+nosve2-aes
%s -### 2>&1 | FileCheck %s --check-prefix=SVE2-AES-REVERT
-// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "-sve2-aes"
+// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "+sve-aes"
"-target-feature" "+sve2" "-target-feature" "-sve2-aes"
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3+nosve2-sha3
%s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SHA3-REVERT
// SVE2-SHA3-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "-sve2-sha3"
@@ -47,8 +47,11 @@
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3 %s -###
2>&1 | FileCheck %s --check-prefix=SVE2-SHA3
// SVE2-SHA3: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "+sve2-sha3"
+// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve-aes %s -### 2>&1
| FileCheck %s --check-prefix=SVE-AES
+// SVE-AES: "-target-feature" "+aes"{{.*}} "-target-feature" "+sve-aes"
+
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes %s -### 2>&1
| FileCheck %s --check-prefix=SVE2-AES
-// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "+sve2-aes"
+// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve-aes"
"-target-feature" "+sve2" "-target-feature" "+sve2-aes"
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sm4 %s -### 2>&1
| FileCheck %s --check-prefix=SVE2-SM4
// SVE2-SM4: "-target-feature" "+sve" "-target-feature" "+sve2"
"-target-feature" "+sve2-sm4"
@@ -65,8 +68,8 @@
// SVE-SUBFEATURE-CONFLICT-NOT: "-target-feature" "+sve2"
// SVE-SUBFEATURE-CONFLICT-NOT: "-target-feature" "+sve"
-// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+nosve+sve2-aes %s
-### 2>&1 | FileCheck %s --check-prefix=SVE-SUBFEATURE-CONFLICT-REV
-// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature"
"+sve2" "-target-feature" "+sve2-aes"
+// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+nosve+sve2-bitperm %s
-### 2>&1 | FileCheck %s --check-prefix=SVE-SUBFEATURE-CONFLICT-REV
+// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature"
"+sve2" "-target-feature" "+sve2-bitperm"
// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-n2+nosve2 %s -###
2>&1 | FileCheck %s --check-prefix=SVE-MCPU-FEATURES
// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2-bitperm"
diff --git a/clang/test/Driver/print-supported-extensions-aarch64.c
b/clang/test/Driver/print-supported-extensions-aarch64.c
index 03eacf99736f9e..205c717d8967cf 100644
--- a/clang/test/Driver/print-supported-extensions-aarch64.c
+++ b/clang/test/Driver/print-supported-extensions-aarch64.c
@@ -77,17 +77,18 @@
// CHECK-NEXT: profile FEAT_SPE
Enable Statistical Profiling extension
// CHECK-NEXT: predres2 FEAT_SPECRES2
Enable Speculation Restriction Instruction
// CHECK-NEXT: ssbs FEAT_SSBS, FEAT_SSBS2
Enable Speculative Store Bypass Safe bit
-// CHECK-NEXT: ssve-aes FEAT_SSVE_AES
Enable Armv9.6-A SVE2 AES support in streaming SVE mode
+// CHECK-NEXT: ssve-aes FEAT_SSVE_AES
Enable Armv9.6-A SVE AES support in streaming SVE mode
// CHECK-NEXT: ssve-fp8dot2 FEAT_SSVE_FP8DOT2
Enable SVE2 FP8 2-way dot product instructions
// CHECK-NEXT: ssve-fp8dot4 FEAT_SSVE_FP8DOT4
Enable SVE2 FP8 4-way dot product instructions
// CHECK-NEXT: ssve-fp8fma FEAT_SSVE_FP8FMA
Enable SVE2 FP8 multiply-add instructions
// CHECK-NEXT: sve FEAT_SVE
Enable Scalable Vector Extension (SVE) instructions
+// CHECK-NEXT: sve-aes FEAT_SVE_AES, FEAT_SVE_PMULL128
Enable SVE AES and 128-bit PMULL instructions
// CHECK-NEXT: sve-aes2 FEAT_SVE_AES2
Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL
instructions
// CHECK-NEXT: sve-b16b16 FEAT_SVE_B16B16
Enable SVE2 non-widening and SME2 Z-targeting non-widening
BFloat16 instructions
// CHECK-NEXT: sve-bfscale FEAT_SVE_BFSCALE
Enable Armv9.6-A SVE BFloat16 scaling instructions
// CHECK-NEXT: sve-f16f32mm FEAT_SVE_F16F32MM
Enable Armv9.6-A FP16 to FP32 Matrix Multiply
// CHECK-NEXT: sve2 FEAT_SVE2
Enable Scalable Vector Extension 2 (SVE2) instructions
-// CHECK-NEXT: sve2-aes FEAT_SVE_AES, FEAT_SVE_PMULL128
Enable AES SVE2 instructions
+// CHECK-NEXT: sve2-aes
An alias of +sve2+sve-aes
// CHECK-NEXT: sve2-bitperm FEAT_SVE_BitPerm
Enable bit permutation SVE2 instructions
// CHECK-NEXT: sve2-sha3 FEAT_SVE_SHA3
Enable SHA3 SVE2 instructions
// CHECK-NEXT: sve2-sm4 FEAT_SVE_SM4
Enable SM4 SVE2 instructions
diff --git a/clang/test/Preprocessor/aarch64-target-features.c
b/clang/test/Preprocessor/aarch64-target-features.c
index 418430b0b19b89..fc786f4b2e9b4d 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -227,8 +227,20 @@
// CHECK-NONEON-NOT: __ARM_FEATURE_SVE 1
// CHECK-NONEON-NOT: __ARM_NEON 1
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve-aes -x c -E
-dM %s -o - | FileCheck --check-prefix=CHECK-SVEAES %s
+// CHECK-SVEAES: __ARM_FEATURE_AES 1
+
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-aes -x c -E
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES %s
+// CHECK-SVE2AES: __ARM_FEATURE_AES 1
+// CHECK-SVE2AES: __ARM_FEATURE_SVE2 1
// CHECK-SVE2AES: __ARM_FEATURE_SVE2_AES 1
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve-aes+sve2 -x c
-E -dM %s -o - | FileCheck --check-prefix=CHECK-SVEAES-SVE2 %s
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_AES 1
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_SVE2 1
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_SVE2_AES 1
+
+
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sha3 -x c -E
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SHA3 %s
// CHECK-SVE2SHA3: __ARM_FEATURE_SVE2_SHA3 1
// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sm4 -x c -E
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SM4 %s
diff --git a/llvm/lib/Target/AArch64/AArch64Features.td
b/llvm/lib/Target/AArch64/AArch64Features.td
index e481da74ba2d6e..7e4473a3844377 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -369,9 +369,12 @@ def FeatureSVE2 : ExtensionWithMArch<"sve2", "SVE2",
"FEAT_SVE2",
"Enable Scalable Vector Extension 2 (SVE2) instructions",
[FeatureSVE, FeatureUseScalarIncVL]>;
-def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES",
+def FeatureSVEAES : ExtensionWithMArch<"sve-aes", "SVEAES",
"FEAT_SVE_AES, FEAT_SVE_PMULL128",
- "Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>;
+ "Enable SVE AES and 128-bit PMULL instructions", [FeatureAES]>;
+
+def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES", "",
+ "An alias of +sve2+sve-aes", [FeatureSVE2, FeatureSVEAES]>;
def FeatureSVE2SM4 : ExtensionWithMArch<"sve2-sm4", "SVE2SM4", "FEAT_SVE_SM4",
"Enable SM4 SVE2 instructions", [FeatureSVE2, FeatureSM4]>;
@@ -542,7 +545,7 @@ def FeatureSME2p2: ExtensionWithMArch<"sme2p2", "SME2p2",
"FEAT_SME2p2",
"Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions",
[FeatureSME2p1]>;
def FeatureSSVE_AES : ExtensionWithMArch<"ssve-aes", "SSVE_AES",
"FEAT_SSVE_AES",
- "Enable Armv9.6-A SVE2 AES support in streaming SVE mode", [FeatureSME2,
FeatureSVE2AES]>;
+ "Enable Armv9.6-A SVE AES support in streaming SVE mode", [FeatureSME2,
FeatureSVEAES]>;
def FeatureSVE2p2 : ExtensionWithMArch<"sve2p2", "SVE2p2", "FEAT_SVE2p2",
"Enable Armv9.6-A Scalable Vector Extension 2.2 instructions",
[FeatureSVE2p1]>;
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 5a487be5723ce9..f1ca5b016a295f 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3734,6 +3734,7 @@ static const struct Extension {
{"rng", {AArch64::FeatureRandGen}},
{"sve", {AArch64::FeatureSVE}},
{"sve-b16b16", {AArch64::FeatureSVEB16B16}},
+ {"sve-aes", {AArch64::FeatureSVEAES}},
{"sve2", {AArch64::FeatureSVE2}},
{"sve2-aes", {AArch64::FeatureSVE2AES}},
{"sve2-sm4", {AArch64::FeatureSVE2SM4}},
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp
b/llvm/unittests/TargetParser/TargetParserTest.cpp
index d69b2d6b13b1a6..ab0bb1d18d32d3 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1334,6 +1334,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_FPRCVT, AArch64::AEK_CMPBR,
AArch64::AEK_LSUI, AArch64::AEK_OCCMO,
AArch64::AEK_PCDPHINT, AArch64::AEK_POPS,
+ AArch64::AEK_SVEAES
};
std::vector<StringRef> Features;
@@ -1369,6 +1370,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+sve-bfscale"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve-f16f32mm"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2"));
+ EXPECT_TRUE(llvm::is_contained(Features, "+sve-aes"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2-aes"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sm4"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sha3"));
@@ -1538,6 +1540,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
{"sve-bfscale", "nosve-bfscale", "+sve-bfscale", "-sve-bfscale"},
{"sve-f16f32mm", "nosve-f16f32mm", "+sve-f16f32mm", "-sve-f16f32mm"},
{"sve2", "nosve2", "+sve2", "-sve2"},
+ {"sve-aes", "nosve-aes", "+sve-aes", "-sve-aes"},
{"sve2-aes", "nosve2-aes", "+sve2-aes", "-sve2-aes"},
{"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"},
{"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"},
@@ -1840,7 +1843,11 @@ AArch64ExtensionDependenciesBaseArchTestParams
{},
{"sve", "sve-f16f32mm"}},
- // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4}
+ // aes -> {sve-aes}
+ {AArch64::ARMV8A, {"noaes", "sve-aes"}, {"aes", "sve-aes"}, {}},
+ {AArch64::ARMV8A, {"sve-aes", "noaes"}, {}, {"aes", "sve-aes"}},
+
+ // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4, sve2-aes}
{AArch64::ARMV8A, {"nosve2", "sve2p1"}, {"sve2", "sve2p1"}, {}},
{AArch64::ARMV8A, {"sve2p1", "nosve2"}, {}, {"sve2", "sve2p1"}},
{AArch64::ARMV8A,
@@ -1855,6 +1862,8 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"sve2-sha3", "nosve2"}, {}, {"sve2", "sve2-sha3"}},
{AArch64::ARMV8A, {"nosve2", "sve2-sm4"}, {"sve2", "sve2-sm4"}, {}},
{AArch64::ARMV8A, {"sve2-sm4", "nosve2"}, {}, {"sve2", "sve2-sm4"}},
+ {AArch64::ARMV8A, {"nosve2", "sve2-aes"}, {"sve2", "sve2-aes"}, {}},
+ {AArch64::ARMV8A, {"sve2-aes", "nosve2"}, {}, {"sve2", "sve2-aes"}},
// sve-b16b16 -> {sme-b16b16}
{AArch64::ARMV9_4A,
@@ -1955,15 +1964,23 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"norcpc", "rcpc3"}, {"rcpc", "rcpc3"}, {}},
{AArch64::ARMV8A, {"rcpc3", "norcpc"}, {}, {"rcpc", "rcpc3"}},
- // sve2-aes -> ssve-aes
+ // sve-aes -> {ssve-aes, sve2-aes}
+ {AArch64::ARMV9_6A,
+ {"nosve-aes", "ssve-aes"},
+ {"sve-aes", "ssve-aes"},
+ {}},
+ {AArch64::ARMV9_6A,
+ {"ssve-aes", "nosve-aes"},
+ {},
+ {"ssve-aes", "sve-aes"}},
{AArch64::ARMV9_6A,
- {"nosve2-aes", "ssve-aes"},
- {"sve2-aes", "ssve-aes"},
+ {"nosve-aes", "sve2-aes"},
+ {"sve2-aes", "sve-aes"},
{}},
{AArch64::ARMV9_6A,
- {"ssve-aes", "nosve2-aes"},
+ {"sve2-aes", "nosve-aes"},
{},
- {"ssve-aes", "sve2-aes"}},
+ {"sve2-aes", "sve-aes"}}
};
INSTANTIATE_TEST_SUITE_P(
>From 0fc4ce10569a89f1c8185b8c9c57eeb8965bdfd4 Mon Sep 17 00:00:00 2001
From: Spencer Abson <spencer.ab...@arm.com>
Date: Wed, 30 Oct 2024 18:46:37 +0000
Subject: [PATCH 2/2] [NFC] fix test format
---
llvm/unittests/TargetParser/TargetParserTest.cpp | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp
b/llvm/unittests/TargetParser/TargetParserTest.cpp
index ab0bb1d18d32d3..792227f763c361 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1334,8 +1334,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_FPRCVT, AArch64::AEK_CMPBR,
AArch64::AEK_LSUI, AArch64::AEK_OCCMO,
AArch64::AEK_PCDPHINT, AArch64::AEK_POPS,
- AArch64::AEK_SVEAES
- };
+ AArch64::AEK_SVEAES};
std::vector<StringRef> Features;
@@ -1980,8 +1979,7 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A,
{"sve2-aes", "nosve-aes"},
{},
- {"sve2-aes", "sve-aes"}}
-};
+ {"sve2-aes", "sve-aes"}}};
INSTANTIATE_TEST_SUITE_P(
AArch64ExtensionDependenciesBaseArch,
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
