================
@@ -0,0 +1,70 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute 
-finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s
+
+// NOTE: The number in type name and whether the struct is packed or not will 
mostly
+// likely change once subscript operators are properly implemented 
(llvm/llvm-project#95956) 
+// and theinterim field of the contained type is removed.
+
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer" = type <{ 
target("dx.RawBuffer", i16, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.0" = type <{ 
target("dx.RawBuffer", i16, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.2" = type { 
target("dx.RawBuffer", i32, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.3" = type { 
target("dx.RawBuffer", i32, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.4" = type { 
target("dx.RawBuffer", i64, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.5" = type { 
target("dx.RawBuffer", i64, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.6" = type <{ 
target("dx.RawBuffer", half, 1, 1) 
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.8" = type { 
target("dx.RawBuffer", float, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.9" = type { 
target("dx.RawBuffer", double, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.10" = type { 
target("dx.RawBuffer", <4 x i16>, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.11" = type { 
target("dx.RawBuffer", <3 x i32>, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.12" = type { 
target("dx.RawBuffer", <2 x half>, 1, 1)
+// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.13" = type { 
target("dx.RawBuffer", <3 x float>, 1, 1)
+
+RasterizerOrderedStructuredBuffer<int16_t> BufI16;
+RasterizerOrderedStructuredBuffer<uint16_t> BufU16;
+RasterizerOrderedStructuredBuffer<int> BufI32;
+RasterizerOrderedStructuredBuffer<uint> BufU32;
+RasterizerOrderedStructuredBuffer<int64_t> BufI64;
+RasterizerOrderedStructuredBuffer<uint64_t> BufU64;
+RasterizerOrderedStructuredBuffer<half> BufF16;
+RasterizerOrderedStructuredBuffer<float> BufF32;
+RasterizerOrderedStructuredBuffer<double> BufF64;
+RasterizerOrderedStructuredBuffer< vector<int16_t, 4> > BufI16x4;
+RasterizerOrderedStructuredBuffer< vector<uint, 3> > BufU32x3;
+RasterizerOrderedStructuredBuffer<half2> BufF16x2;
+RasterizerOrderedStructuredBuffer<float3> BufF32x3;
+// TODO: RasterizerOrderedStructuredBuffer<snorm half> BufSNormF16;
----------------
hekota wrote:

Maybe we should disable the old resource annotations for UAVs and SRVs because 
they have already been converted to LLVM target types and are processed in the 
DXILResource analysis pass. Then we can add a test case with user defined type 
here.

https://github.com/llvm/llvm-project/pull/113648
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