yonghong-song wrote: For commit 2, I see the following commit messages: ``` Unlike existing atomic operations that only support BPF_W (32-bit) and BPF_DW (64-bit) size modifiers, load-acquires and store-releases also support BPF_B (8-bit) and BPF_H (16-bit). An 8- or 16-bit load-acquire zero-extends the value before writing it to a 32-bit register, just like ARM64 instruction LDAPRH and friends. ```
Currently for load, we have class BPF_MEM and BPF_MEMSX whre BPF_MEM represents unsigned load and BPF_MEMSX represents load with sign-extension. If we replace BPF_MEM/BPF_MEMSX with BPF_ATOMIC, then we lose distinction between unsigned and signed for 8- and 16-bit loads. In the above, you will do unsigned load extension. But what about signed extension load variant? https://github.com/llvm/llvm-project/pull/108636 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
