Author: Albert Huang Date: 2024-10-14T15:48:12+01:00 New Revision: aa2c0f35a102b5afc128e19ccb2b9402026c531f
URL: https://github.com/llvm/llvm-project/commit/aa2c0f35a102b5afc128e19ccb2b9402026c531f DIFF: https://github.com/llvm/llvm-project/commit/aa2c0f35a102b5afc128e19ccb2b9402026c531f.diff LOG: [ARM] [AArch32] Add support for Arm China STAR-MC1 CPU (#110085) STAR-MC1 is an Armv8m CPU. Technical specifications available at: https://www.armchina.com/download/Documents/Application-Notes/Technical-Reference-Manual?infoId=160 Added: Modified: clang/test/Driver/arm-cortex-cpus-2.c clang/test/Misc/target-invalid-cpu-note/arm.c llvm/include/llvm/TargetParser/ARMTargetParser.def llvm/lib/Target/ARM/ARMProcessors.td llvm/lib/TargetParser/Host.cpp llvm/test/CodeGen/ARM/cmse-cve-2021-35465.ll llvm/unittests/TargetParser/TargetParserTest.cpp Removed: ################################################################################ diff --git a/clang/test/Driver/arm-cortex-cpus-2.c b/clang/test/Driver/arm-cortex-cpus-2.c index 5ce3758655b500..2f17a081404361 100644 --- a/clang/test/Driver/arm-cortex-cpus-2.c +++ b/clang/test/Driver/arm-cortex-cpus-2.c @@ -559,8 +559,10 @@ // CHECK-CPUV8MBASE: "-cc1"{{.*}} "-triple" "thumbv8m.base- // RUN: %clang -target arm -mcpu=cortex-m33 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-M33 %s +// RUN: %clang -target arm -mcpu=star-mc1 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-STAR-MC1 %s // RUN: %clang -target arm -mcpu=cortex-m35p -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-M35P %s // CHECK-CORTEX-M33: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "cortex-m33" +// CHECK-STAR-MC1: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "star-mc1" // CHECK-CORTEX-M35P: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "cortex-m35p" // RUN: %clang -target arm -mcpu=cortex-m55 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-M55 %s diff --git a/clang/test/Misc/target-invalid-cpu-note/arm.c b/clang/test/Misc/target-invalid-cpu-note/arm.c index 27608cc6eb29fc..17280a9edd221d 100644 --- a/clang/test/Misc/target-invalid-cpu-note/arm.c +++ b/clang/test/Misc/target-invalid-cpu-note/arm.c @@ -65,6 +65,7 @@ // CHECK-SAME: {{^}}, cortex-m7 // CHECK-SAME: {{^}}, cortex-m23 // CHECK-SAME: {{^}}, cortex-m33 +// CHECK-SAME: {{^}}, star-mc1 // CHECK-SAME: {{^}}, cortex-m35p // CHECK-SAME: {{^}}, cortex-m55 // CHECK-SAME: {{^}}, cortex-m85 diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def index 7480d45807f23c..c5cd1b1bc63765 100644 --- a/llvm/include/llvm/TargetParser/ARMTargetParser.def +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def @@ -342,6 +342,7 @@ ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m7", ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) +ARM_CPU_NAME("star-mc1", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-m55", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16)) diff --git a/llvm/lib/Target/ARM/ARMProcessors.td b/llvm/lib/Target/ARM/ARMProcessors.td index ce767b2b968e17..08f62d12f4a9f1 100644 --- a/llvm/lib/Target/ARM/ARMProcessors.td +++ b/llvm/lib/Target/ARM/ARMProcessors.td @@ -362,6 +362,16 @@ def : ProcessorModel<"cortex-m33", CortexM4Model, [ARMv8mMainline, FeatureHasNoBranchPredictor, FeatureFixCMSE_CVE_2021_35465]>; +def : ProcessorModel<"star-mc1", CortexM4Model, [ARMv8mMainline, + FeatureDSP, + FeatureFPARMv8_D16_SP, + FeaturePreferBranchAlign32, + FeatureHasSlowFPVMLx, + FeatureHasSlowFPVFMx, + FeatureUseMISched, + FeatureHasNoBranchPredictor, + FeatureFixCMSE_CVE_2021_35465]>; + def : ProcessorModel<"cortex-m35p", CortexM4Model, [ARMv8mMainline, FeatureDSP, FeatureFPARMv8_D16_SP, diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp index 6e1f4b6052bda8..9834aaacba18d0 100644 --- a/llvm/lib/TargetParser/Host.cpp +++ b/llvm/lib/TargetParser/Host.cpp @@ -342,6 +342,12 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) { } } + if (Implementer == "0x63") { // Arm China. + return StringSwitch<const char *>(Part) + .Case("0x132", "star-mc1") + .Default("generic"); + } + if (Implementer == "0x6d") { // Microsoft Corporation. // The Microsoft Azure Cobalt 100 CPU is handled as a Neoverse N2. return StringSwitch<const char *>(Part) diff --git a/llvm/test/CodeGen/ARM/cmse-cve-2021-35465.ll b/llvm/test/CodeGen/ARM/cmse-cve-2021-35465.ll index 31a0b9814d7f1f..5be0641420fc29 100644 --- a/llvm/test/CodeGen/ARM/cmse-cve-2021-35465.ll +++ b/llvm/test/CodeGen/ARM/cmse-cve-2021-35465.ll @@ -7,6 +7,9 @@ ; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=cortex-m33 -verify-machineinstrs | \ ; RUN: FileCheck %s --check-prefix=CHECK-8M-FP-CVE-2021-35465 ; +; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=star-mc1 -verify-machineinstrs | \ +; RUN: FileCheck %s --check-prefix=CHECK-8M-FP-CVE-2021-35465 +; ; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=cortex-m35p -verify-machineinstrs | \ ; RUN: FileCheck %s --check-prefix=CHECK-8M-FP-CVE-2021-35465 ; @@ -17,6 +20,9 @@ ; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=cortex-m33 -mattr=-fpregs -verify-machineinstrs | \ ; RUN: FileCheck %s --check-prefix=CHECK-8M-NOFP-CVE-2021-35465 ; +; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=star-mc1 -mattr=-fpregs -verify-machineinstrs | \ +; RUN: FileCheck %s --check-prefix=CHECK-8M-NOFP-CVE-2021-35465 +; ; RUN: llc %s -o - -mtriple=thumbv8m.main -mcpu=cortex-m35p -mattr=-fpregs -verify-machineinstrs | \ ; RUN: FileCheck %s --check-prefix=CHECK-8M-NOFP-CVE-2021-35465 ; diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 5b5d45f6c574bf..87b78d502780d1 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -490,6 +490,9 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams<uint64_t>("cortex-m33", "armv8-m.main", "fpv5-sp-d16", ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline"), + ARMCPUTestParams<uint64_t>("star-mc1", "armv8-m.main", "fpv5-sp-d16", + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, + "8-M.Mainline"), ARMCPUTestParams<uint64_t>("cortex-m35p", "armv8-m.main", "fpv5-sp-d16", ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline"), @@ -518,7 +521,7 @@ INSTANTIATE_TEST_SUITE_P( "7-S")), ARMCPUTestParams<uint64_t>::PrintToStringParamName); -static constexpr unsigned NumARMCPUArchs = 92; +static constexpr unsigned NumARMCPUArchs = 93; TEST(TargetParserTest, testARMCPUArchList) { SmallVector<StringRef, NumARMCPUArchs> List; _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
