================
@@ -401,27 +402,57 @@ def VQRSHL : SInst<"vqrshl", "..S",
"csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
////////////////////////////////////////////////////////////////////////////////
// E.3.12 Shifts by constant
let isShift = 1 in {
-def VSHR_N : SInst<"vshr_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VSHL_N : IInst<"vshl_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VRSHR_N : SInst<"vrshr_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VSRA_N : SInst<"vsra_n", "...I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VRSRA_N : SInst<"vrsra_n", "...I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VQSHL_N : SInst<"vqshl_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VQSHLU_N : SInst<"vqshlu_n", "U.I", "csilQcQsQiQl">;
-def VSHRN_N : IInst<"vshrn_n", "<QI", "silUsUiUl">;
-def VQSHRUN_N : SInst<"vqshrun_n", "(<U)QI", "sil">;
-def VQRSHRUN_N : SInst<"vqrshrun_n", "(<U)QI", "sil">;
-def VQSHRN_N : SInst<"vqshrn_n", "<QI", "silUsUiUl">;
-def VRSHRN_N : IInst<"vrshrn_n", "<QI", "silUsUiUl">;
-def VQRSHRN_N : SInst<"vqrshrn_n", "<QI", "silUsUiUl">;
-def VSHLL_N : SInst<"vshll_n", "(>Q).I", "csiUcUsUi">;
+
+
+def VSHR_N : SInst<"vshr_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<1, ImmCheckShiftRight>]>;
+def VSHL_N : IInst<"vshl_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<1, ImmCheckShiftLeft>]>;
+def VRSHR_N : SInst<"vrshr_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<1, ImmCheckShiftRight>]>;
+def VSRA_N : SInst<"vsra_n", "...I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<2, ImmCheckShiftRight>]>;
+def VRSRA_N : SInst<"vrsra_n", "...I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<2, ImmCheckShiftRight>]>;
+def VQSHL_N : SInst<"vqshl_n", "..I", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl",
+ [ImmCheck<1, ImmCheckShiftLeft>]>;
+def VQSHLU_N : SInst<"vqshlu_n", "U.I", "csilQcQsQiQl",
+ [ImmCheck<1, ImmCheckShiftLeft>]>;
+
+// Narrowing right shifts should have an immediate range of
1..(sizeinbits(arg)/2).
+// However, as the overloaded type code that is supplied to a polymorphic
builtin
+// is that of the return type (half as wide as the argument in this case),
using
+// ImmCheckShiftRightNarrow would return in an upper bound of
(sizeinbits(arg)/2)/2.
+// ImmCheckShiftRight produces the correct behavior here.
+def VSHRN_N : IInst<"vshrn_n", "<QI", "silUsUiUl",
----------------
CarolineConcatto wrote:
nit: remove white spaces at the end the lines bellow, I can only see if I push
the patch
https://github.com/llvm/llvm-project/pull/100278
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
