llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-x86 Author: Freddy Ye (FreddyLeaf) <details> <summary>Changes</summary> To align with gas's latest changes. --- Patch is 105.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/103898.diff 11 Files Affected: - (modified) clang/test/CodeGen/X86/cmpccxadd-builtins.c (+24-24) - (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp (+6-7) - (modified) llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll (+60-60) - (modified) llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt (+40-40) - (modified) llvm/test/MC/Disassembler/X86/cmpccxadd-64.txt (+144-144) - (modified) llvm/test/MC/X86/apx/cmpccxadd-att.s (+40-40) - (modified) llvm/test/MC/X86/apx/cmpccxadd-intel.s (+40-40) - (modified) llvm/test/MC/X86/cmpccxadd-att-alias.s (+13-13) - (modified) llvm/test/MC/X86/cmpccxadd-att.s (+144-144) - (modified) llvm/test/MC/X86/cmpccxadd-intel-alias.s (+13-13) - (modified) llvm/test/MC/X86/cmpccxadd-intel.s (+144-144) ``````````diff diff --git a/clang/test/CodeGen/X86/cmpccxadd-builtins.c b/clang/test/CodeGen/X86/cmpccxadd-builtins.c index 6daed3a1b17b67..f058dc9b2baa46 100644 --- a/clang/test/CodeGen/X86/cmpccxadd-builtins.c +++ b/clang/test/CodeGen/X86/cmpccxadd-builtins.c @@ -52,50 +52,50 @@ long long test_cmplxadd64(void *__A, long long __B, long long __C) { return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NB); } -int test_cmpnbexadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpnbexadd32( +int test_cmpaxadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpaxadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 4) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_Z); } -long long test_cmpnbexadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpnbexadd64( +long long test_cmpaxadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpaxadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 4) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_Z); } -int test_cmpnbxadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpnbxadd32( +int test_cmpaexadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpaexadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 5) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NZ); } -long long test_cmpnbxadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpnbxadd64( +long long test_cmpaexadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpaexadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 5) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NZ); } -int test_cmpnlexadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpnlexadd32( +int test_cmpgxadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpgxadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 6) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_BE); } -long long test_cmpnlexadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpnlexadd64( +long long test_cmpgxadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpgxadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 6) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_BE); } -int test_cmpnlxadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpnlxadd32( +int test_cmpgexadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpgexadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 7) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NBE); } -long long test_cmpnlxadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpnlxadd64( +long long test_cmpgexadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpgexadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 7) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NBE); } @@ -136,14 +136,14 @@ long long test_cmpnsxadd64(void *__A, long long __B, long long __C) { return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_P); } -int test_cmpnzxadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpnzxadd32( +int test_cmpnexadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpnexadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 11) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NP); } -long long test_cmpnzxadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpnzxadd64( +long long test_cmpnexadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpnexadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 11) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NP); } @@ -184,14 +184,14 @@ long long test_cmpsxadd64(void *__A, long long __B, long long __C) { return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_LE); } -int test_cmpzxadd32(void *__A, int __B, int __C) { - // CHECK-LABEL: @test_cmpzxadd32( +int test_cmpexadd32(void *__A, int __B, int __C) { + // CHECK-LABEL: @test_cmpexadd32( // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 15) return _cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NLE); } -long long test_cmpzxadd64(void *__A, long long __B, long long __C) { - // CHECK-LABEL: @test_cmpzxadd64( +long long test_cmpexadd64(void *__A, long long __B, long long __C) { + // CHECK-LABEL: @test_cmpexadd64( // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 15) return _cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NLE); } diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp index 21c1556d1d8ed2..ad1f2dc532d1c2 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp @@ -30,7 +30,6 @@ void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op, raw_ostream &O) { int64_t Imm = MI->getOperand(Op).getImm(); unsigned Opc = MI->getOpcode(); - bool IsCMPCCXADD = X86::isCMPCCXADD(Opc); bool IsCCMPOrCTEST = X86::isCCMPCC(Opc) || X86::isCTESTCC(Opc); // clang-format off @@ -39,19 +38,19 @@ void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op, case 0: O << "o"; break; case 1: O << "no"; break; case 2: O << "b"; break; - case 3: O << (IsCMPCCXADD ? "nb" : "ae"); break; - case 4: O << (IsCMPCCXADD ? "z" : "e"); break; - case 5: O << (IsCMPCCXADD ? "nz" : "ne"); break; + case 3: O << "ae"; break; + case 4: O << "e"; break; + case 5: O << "ne"; break; case 6: O << "be"; break; - case 7: O << (IsCMPCCXADD ? "nbe" : "a"); break; + case 7: O << "a"; break; case 8: O << "s"; break; case 9: O << "ns"; break; case 0xa: O << (IsCCMPOrCTEST ? "t" : "p"); break; case 0xb: O << (IsCCMPOrCTEST ? "f" : "np"); break; case 0xc: O << "l"; break; - case 0xd: O << (IsCMPCCXADD ? "nl" : "ge"); break; + case 0xd: O << "ge"; break; case 0xe: O << "le"; break; - case 0xf: O << (IsCMPCCXADD ? "nle" : "g"); break; + case 0xf: O << "g"; break; } // clang-format on } diff --git a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll index f88216f95a7614..561289c1b77465 100644 --- a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll +++ b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll @@ -112,13 +112,13 @@ define dso_local i32 @test_cmplxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { ; CHECK-LABEL: test_cmplxadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpnbxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe3,0x07] +; CHECK-NEXT: cmpaexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe3,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; ; EGPR-LABEL: test_cmplxadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; EGPR-NEXT: cmpnbxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe3,0x07] +; EGPR-NEXT: cmpaexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe3,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 3) @@ -129,95 +129,95 @@ define dso_local i64 @test_cmplxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { ; CHECK-LABEL: test_cmplxadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; CHECK-NEXT: cmpnbxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe3,0x07] +; CHECK-NEXT: cmpaexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe3,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; ; EGPR-LABEL: test_cmplxadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; EGPR-NEXT: cmpnbxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe3,0x07] +; EGPR-NEXT: cmpaexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe3,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 3) ret i64 %0 } -define dso_local i32 @test_cmpnbexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpnbexadd32: +define dso_local i32 @test_cmpaxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpaxadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe4,0x07] +; CHECK-NEXT: cmpexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe4,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnbexadd32: +; EGPR-LABEL: test_cmpaxadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; EGPR-NEXT: cmpzxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe4,0x07] +; EGPR-NEXT: cmpexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe4,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 4) ret i32 %0 } -define dso_local i64 @test_cmpnbexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { -; CHECK-LABEL: test_cmpnbexadd64: +define dso_local i64 @test_cmpaxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { +; CHECK-LABEL: test_cmpaxadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; CHECK-NEXT: cmpzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe4,0x07] +; CHECK-NEXT: cmpexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe4,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnbexadd64: +; EGPR-LABEL: test_cmpaxadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; EGPR-NEXT: cmpzxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe4,0x07] +; EGPR-NEXT: cmpexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe4,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 4) ret i64 %0 } -define dso_local i32 @test_cmpnbxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpnbxadd32: +define dso_local i32 @test_cmpaexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpaexadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpnzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe5,0x07] +; CHECK-NEXT: cmpnexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe5,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnbxadd32: +; EGPR-LABEL: test_cmpaexadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; EGPR-NEXT: cmpnzxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe5,0x07] +; EGPR-NEXT: cmpnexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe5,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 5) ret i32 %0 } -define dso_local i64 @test_cmpnbxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { -; CHECK-LABEL: test_cmpnbxadd64: +define dso_local i64 @test_cmpaexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { +; CHECK-LABEL: test_cmpaexadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; CHECK-NEXT: cmpnzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe5,0x07] +; CHECK-NEXT: cmpnexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe5,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnbxadd64: +; EGPR-LABEL: test_cmpaexadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; EGPR-NEXT: cmpnzxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe5,0x07] +; EGPR-NEXT: cmpnexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe5,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 5) ret i64 %0 } -define dso_local i32 @test_cmpnlexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpnlexadd32: +define dso_local i32 @test_cmpgxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpgxadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] ; CHECK-NEXT: cmpbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe6,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnlexadd32: +; EGPR-LABEL: test_cmpgxadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] ; EGPR-NEXT: cmpbexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe6,0x07] @@ -227,14 +227,14 @@ entry: ret i32 %0 } -define dso_local i64 @test_cmpnlexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { -; CHECK-LABEL: test_cmpnlexadd64: +define dso_local i64 @test_cmpgxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { +; CHECK-LABEL: test_cmpgxadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] ; CHECK-NEXT: cmpbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe6,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnlexadd64: +; EGPR-LABEL: test_cmpgxadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] ; EGPR-NEXT: cmpbexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe6,0x07] @@ -244,34 +244,34 @@ entry: ret i64 %0 } -define dso_local i32 @test_cmpnlxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpnlxadd32: +define dso_local i32 @test_cmpgexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpgexadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpnbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe7,0x07] +; CHECK-NEXT: cmpaxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe7,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnlxadd32: +; EGPR-LABEL: test_cmpgexadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; EGPR-NEXT: cmpnbexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe7,0x07] +; EGPR-NEXT: cmpaxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe7,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 7) ret i32 %0 } -define dso_local i64 @test_cmpnlxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { -; CHECK-LABEL: test_cmpnlxadd64: +define dso_local i64 @test_cmpgexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { +; CHECK-LABEL: test_cmpgexadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; CHECK-NEXT: cmpnbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe7,0x07] +; CHECK-NEXT: cmpaxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe7,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnlxadd64: +; EGPR-LABEL: test_cmpgexadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; EGPR-NEXT: cmpnbexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe7,0x07] +; EGPR-NEXT: cmpaxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe7,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 7) @@ -380,14 +380,14 @@ entry: ret i64 %0 } -define dso_local i32 @test_cmpnzxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpnzxadd32: +define dso_local i32 @test_cmpnexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpnexadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] ; CHECK-NEXT: cmpnpxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xeb,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnzxadd32: +; EGPR-LABEL: test_cmpnexadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] ; EGPR-NEXT: cmpnpxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xeb,0x07] @@ -397,14 +397,14 @@ entry: ret i32 %0 } -define dso_local i64 @test_cmpnzxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { -; CHECK-LABEL: test_cmpnzxadd64: +define dso_local i64 @test_cmpnexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { +; CHECK-LABEL: test_cmpnexadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] ; CHECK-NEXT: cmpnpxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xeb,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; -; EGPR-LABEL: test_cmpnzxadd64: +; EGPR-LABEL: test_cmpnexadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] ; EGPR-NEXT: cmpnpxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xeb,0x07] @@ -452,13 +452,13 @@ define dso_local i32 @test_cmppxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { ; CHECK-LABEL: test_cmppxadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpnlxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xed,0x07] +; CHECK-NEXT: cmpgexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xed,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; ; EGPR-LABEL: test_cmppxadd32: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; EGPR-NEXT: cmpnlxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xed,0x07] +; EGPR-NEXT: cmpgexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xed,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 13) @@ -469,13 +469,13 @@ define dso_local i64 @test_cmppxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind { ; CHECK-LABEL: test_cmppxadd64: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; CHECK-NEXT: cmpnlxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xed,0x07] +; CHECK-NEXT: cmpgexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xed,0x07] ; CHECK-NEXT: retq # encoding: [0xc3] ; ; EGPR-LABEL: test_cmppxadd64: ; EGPR: # %bb.0: # %entry ; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0] -; EGPR-NEXT: cmpnlxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xed,0x07] +; EGPR-NEXT: cmpgexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xed,0x07] ; EGPR-NEXT: retq # encoding: [0xc3] entry: %0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 13) @@ -516,34 +516,34 @@ entry: ret i64 %0 } -define dso_local i32 @test_cmpzxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { -; CHECK-LABEL: test_cmpzxadd32: +define dso_local i32 @test_cmpexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind { +; CHECK-LABEL: test_cmpexadd32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] -; CHECK-NEXT: cmpnlexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xef,0x07] +; CHECK-NEXT: cmpgxadd %edx, %eax, (%rdi) #... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/103898 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
