[clang] [llvm] [RISCV] Add sifive-p470 processor (PR #102022)

[Pengcheng Wang via cfe-commits]

================
@@ -1371,7 +1371,6 @@ def NoConditionalMoveFusion  : 
Predicate<"!Subtarget->hasConditionalMoveFusion()
 
 def TuneSiFive7 : SubtargetFeature<"sifive7", "RISCVProcFamily", "SiFive7",
                                    "SiFive 7-Series processors">;
-
----------------
wangpc-pp wrote:

Removed by accident?

https://github.com/llvm/llvm-project/pull/102022
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits