================
@@ -7763,6 +7763,41 @@ VPValue *VPRecipeBuilder::createEdgeMask(BasicBlock
*Src, BasicBlock *Dst) {
VPValue *SrcMask = getBlockInMask(Src);
+ if (auto *SI = dyn_cast<SwitchInst>(Src->getTerminator())) {
+ // Create mask where the terminator in Src is a switch. We need to handle 2
+ // separate cases:
+ // 1. Dst is not the default desintation. Dst is reached if any of the
cases
+ // with destination == Dst are taken. Join the conditions for each case
+ // where destination == Dst using a logical OR.
+ // 2. Dst is the default destination. Dst is reached if none of the cases
+ // with destination != Dst are taken. Join the conditions for each case
+ // where the destination is != Dst using a logical OR and negate it.
+ VPValue *Mask = nullptr;
+ VPValue *Cond = getVPValueOrAddLiveIn(SI->getCondition(), Plan);
+ bool IsDefault = SI->getDefaultDest() == Dst;
+ for (auto &C : SI->cases()) {
+ if (IsDefault) {
+ if (C.getCaseSuccessor() == Dst)
+ continue;
+ } else if (C.getCaseSuccessor() != Dst)
+ continue;
+
+ VPValue *Eq = EdgeMaskCache.lookup({Src, C.getCaseSuccessor()});
----------------
fhahn wrote:
Yes that is currently happening for some test cases, but should be cleaned up
by VPlan-to-VPlan recipe simplification (follow-up needed)
https://github.com/llvm/llvm-project/pull/99808
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