================ @@ -57594,6 +57599,86 @@ static SDValue combinePDEP(SDNode *N, SelectionDAG &DAG, return SDValue(); } +// Fixup the MMX intrinsics' types: in IR they are expressed with <1 x i64>, ---------------- jyknight wrote:
No -- the problem is that DAGtoDAG is after LegalizeTypes, and v1i64 is not a legal type. LegalizeTypes can't do anything to legalize the vector type arg to an intrinsic, so we need to fix the operand/result types of the intrinsic first, before LegalizeTypes sees it. https://github.com/llvm/llvm-project/pull/98505 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
