================
@@ -855,6 +863,25 @@ __rndrrs(uint64_t *__p) {
}
#endif
+/* 11.2 Guarded Control Stack intrinsics */
+#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE
+static __inline__ void * __attribute__((__always_inline__, __nodebug__))
+__gcspr() {
+ return (void *)__builtin_arm_rsr64("gcspr_el0");
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__,
target("gcs")))
+__gcspopm() {
+ return __builtin_arm_gcspopm(0);
+}
+
+static __inline__ const void * __attribute__((__always_inline__, __nodebug__,
target("gcs")))
+__gcsss(const void *__stack) {
+ __builtin_arm_gcsss1(__stack);
+ return __builtin_arm_gcsss2(0);
+}
----------------
john-brawn-arm wrote:
Having builtins that directly match the instructions is more convenient in
terms of implementation. Tablegen gives the error "Cannot handle instructions
producing instructions with temporaries yet!" if you try to have a pattern with
two output instructions when the output of one isn't the input of another, so
this would require custom lowering.
https://github.com/llvm/llvm-project/pull/96903
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