================ @@ -108,6 +108,12 @@ Changes to the AArch64 Backend in ``standard`` being equal to ``bti+pac-ret+pc`` when ``+pauth-lr`` is passed as part of ``-mcpu=`` options. +* SVE and SVE2 have been moved to the default extensions list for ARMv9.0, + making them optional per the Arm ARM. Existing v9.0+ CPUs in the backend that + support these extensions continue to have these features enabled by default + when specified via ``-mcpu=``. The attribute ``"target-features"="+v9a"`` no ---------------- jroelofs wrote:
I mean both. Adjusted to clarify this. https://github.com/llvm/llvm-project/pull/96007 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
