llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-aarch64 Author: Jon Roelofs (jroelofs) <details> <summary>Changes</summary> --- Full diff: https://github.com/llvm/llvm-project/pull/95579.diff 5 Files Affected: - (modified) clang/test/Misc/target-invalid-cpu-note.c (+2-2) - (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+8-1) - (modified) llvm/lib/Target/AArch64/AArch64Processors.td (+48-16) - (modified) llvm/lib/Target/AArch64/AArch64Subtarget.cpp (+2) - (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+45-30) ``````````diff diff --git a/clang/test/Misc/target-invalid-cpu-note.c b/clang/test/Misc/target-invalid-cpu-note.c index 5362c6f882c25..ffc57db825bbc 100644 --- a/clang/test/Misc/target-invalid-cpu-note.c +++ b/clang/test/Misc/target-invalid-cpu-note.c @@ -5,11 +5,11 @@ // RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AARCH64 // AARCH64: error: unknown target CPU 'not-a-cpu' -// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a520ae, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-a720ae, cortex-a725, cortex-r82, cortex-r82ae, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, cortex-x925, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-n3, neoverse-512tvb, neoverse-v1, neoverse-v2, neoverse-v3, neoverse-v3ae, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, oryon-1, cobalt-100, grace{{$}} +// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a520ae, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-a720ae, cortex-a725, cortex-r82, cortex-r82ae, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, cortex-x925, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-n3, neoverse-512tvb, neoverse-v1, neoverse-v2, neoverse-v3, neoverse-v3ae, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-m4, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, oryon-1, cobalt-100, grace{{$}} // RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_AARCH64 // TUNE_AARCH64: error: unknown target CPU 'not-a-cpu' -// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a520ae, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-a720ae, cortex-a725, cortex-r82, cortex-r82ae, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, cortex-x925, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-n3, neoverse-512tvb, neoverse-v1, neoverse-v2, neoverse-v3, neoverse-v3ae, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, oryon-1, cobalt-100, grace{{$}} +// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a520ae, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-a720ae, cortex-a725, cortex-r82, cortex-r82ae, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, cortex-x925, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-n3, neoverse-512tvb, neoverse-v1, neoverse-v2, neoverse-v3, neoverse-v3ae, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-m4, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, oryon-1, cobalt-100, grace{{$}} // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86 // X86: error: unknown target CPU 'not-a-cpu' diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index df8e685eb6667..c1a68a0ec5c19 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -521,7 +521,14 @@ inline constexpr CpuInfo CpuInfos[] = { AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP16, AArch64::AEK_FP16FML})}, - + // Technically apple-m4 is ARMv9.2a, but a quirk of LLVM defines v9.0 as + // requiring SVE, which is optional according to the Arm ARM and not + // supported by the core. ARMv8.7a is the next closest choice. + {"apple-m4", ARMV8_7A, + AArch64::ExtensionBitset( + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, + AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_SME, + AArch64::AEK_SME2, AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64})}, {"apple-s4", ARMV8_3A, AArch64::ExtensionBitset( {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td index c04c20c78e8eb..b4a79d18acc42 100644 --- a/llvm/lib/Target/AArch64/AArch64Processors.td +++ b/llvm/lib/Target/AArch64/AArch64Processors.td @@ -398,6 +398,22 @@ def TuneAppleA17 : SubtargetFeature<"apple-a17", "ARMProcFamily", "AppleA17", FeatureZCRegMove, FeatureZCZeroing]>; +def TuneAppleM4 : SubtargetFeature<"apple-m4", "ARMProcFamily", "AppleM4", + "Apple M4", [ + FeatureAlternateSExtLoadCVTF32Pattern, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, + FeatureDisableLatencySchedHeuristic, + FeatureFuseAddress, + FeatureFuseAES, + FeatureFuseArithmeticLogic, + FeatureFuseCCSelect, + FeatureFuseCryptoEOR, + FeatureFuseLiterals, + FeatureZCRegMove, + FeatureZCZeroing + ]>; + def TuneExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3", "Samsung Exynos-M3 processors", [FeatureExynosCheapAsMoveHandling, @@ -784,6 +800,14 @@ def ProcessorFeatures { FeatureNEON, FeaturePerfMon, FeatureSHA3, FeatureFullFP16, FeatureFP16FML, FeatureHCX]; + // Technically apple-m4 is ARMv9.2. See the corresponding comment in + // AArch64TargetParser.h. + list<SubtargetFeature> AppleM4 = [HasV8_7aOps, FeatureCrypto, FeatureFPARMv8, + FeatureNEON, FeaturePerfMon, FeatureSHA3, + FeatureFullFP16, FeatureFP16FML, + FeatureAES, FeatureBF16, + FeatureSME2, + FeatureSMEF64F64, FeatureSMEI16I64]; list<SubtargetFeature> ExynosM3 = [HasV8_0aOps, FeatureCRC, FeatureCrypto, FeaturePerfMon]; list<SubtargetFeature> ExynosM4 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, @@ -983,50 +1007,58 @@ def : ProcessorModel<"thunderx3t110", ThunderX3T110Model, def : ProcessorModel<"tsv110", TSV110Model, ProcessorFeatures.TSV110, [TuneTSV110]>; +// iPhone, iPad, Mac and Watch CPUs + // Support cyclone as an alias for apple-a7 so we can still LTO old bitcode. def : ProcessorModel<"cyclone", CycloneModel, ProcessorFeatures.AppleA7, [TuneAppleA7]>; - -// iPhone and iPad CPUs def : ProcessorModel<"apple-a7", CycloneModel, ProcessorFeatures.AppleA7, [TuneAppleA7]>; def : ProcessorModel<"apple-a8", CycloneModel, ProcessorFeatures.AppleA7, [TuneAppleA7]>; def : ProcessorModel<"apple-a9", CycloneModel, ProcessorFeatures.AppleA7, [TuneAppleA7]>; + def : ProcessorModel<"apple-a10", CycloneModel, ProcessorFeatures.AppleA10, [TuneAppleA10]>; + def : ProcessorModel<"apple-a11", CycloneModel, ProcessorFeatures.AppleA11, [TuneAppleA11]>; + def : ProcessorModel<"apple-a12", CycloneModel, ProcessorFeatures.AppleA12, [TuneAppleA12]>; +def : ProcessorModel<"apple-s4", CycloneModel, ProcessorFeatures.AppleA12, + [TuneAppleA12]>; +def : ProcessorModel<"apple-s5", CycloneModel, ProcessorFeatures.AppleA12, + [TuneAppleA12]>; + def : ProcessorModel<"apple-a13", CycloneModel, ProcessorFeatures.AppleA13, [TuneAppleA13]>; + def : ProcessorModel<"apple-a14", CycloneModel, ProcessorFeatures.AppleA14, [TuneAppleA14]>; -def : ProcessorModel<"apple-a15", CycloneModel, ProcessorFeatures.AppleA15, - [TuneAppleA15]>; -def : ProcessorModel<"apple-a16", CycloneModel, ProcessorFeatures.AppleA16, - [TuneAppleA16]>; -def : ProcessorModel<"apple-a17", CycloneModel, ProcessorFeatures.AppleA17, - [TuneAppleA17]>; -// Mac CPUs def : ProcessorModel<"apple-m1", CycloneModel, ProcessorFeatures.AppleA14, [TuneAppleA14]>; + +def : ProcessorModel<"apple-a15", CycloneModel, ProcessorFeatures.AppleA15, + [TuneAppleA15]>; def : ProcessorModel<"apple-m2", CycloneModel, ProcessorFeatures.AppleA15, [TuneAppleA15]>; + +def : ProcessorModel<"apple-a16", CycloneModel, ProcessorFeatures.AppleA16, + [TuneAppleA16]>; def : ProcessorModel<"apple-m3", CycloneModel, ProcessorFeatures.AppleA16, [TuneAppleA16]>; -// watch CPUs. -def : ProcessorModel<"apple-s4", CycloneModel, ProcessorFeatures.AppleA12, - [TuneAppleA12]>; -def : ProcessorModel<"apple-s5", CycloneModel, ProcessorFeatures.AppleA12, - [TuneAppleA12]>; +def : ProcessorModel<"apple-a17", CycloneModel, ProcessorFeatures.AppleA17, + [TuneAppleA17]>; + +def : ProcessorModel<"apple-m4", CycloneModel, ProcessorFeatures.AppleM4, + [TuneAppleM4]>; // Alias for the latest Apple processor model supported by LLVM. -def : ProcessorModel<"apple-latest", CycloneModel, ProcessorFeatures.AppleA16, - [TuneAppleA16]>; +def : ProcessorModel<"apple-latest", CycloneModel, ProcessorFeatures.AppleM4, + [TuneAppleM4]>; // Fujitsu A64FX def : ProcessorModel<"a64fx", A64FXModel, ProcessorFeatures.A64FX, diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp index 2920066cfdcff..1fad1d5ca6d7d 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp @@ -182,6 +182,7 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) { case AppleA15: case AppleA16: case AppleA17: + case AppleM4: CacheLineSize = 64; PrefetchDistance = 280; MinPrefetchStride = 2048; @@ -191,6 +192,7 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) { case AppleA15: case AppleA16: case AppleA17: + case AppleM4: MaxInterleaveFactor = 4; break; default: diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 23555dfc68dc0..78efa6e5332c4 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -1559,6 +1559,24 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.3-A"), + ARMCPUTestParams<AArch64::ExtensionBitset>( + "apple-s4", "armv8.3-a", "crypto-neon-fp-armv8", + AArch64::ExtensionBitset( + {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, + AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, + AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_PAUTH}), + "8.3-A"), + ARMCPUTestParams<AArch64::ExtensionBitset>( + "apple-s5", "armv8.3-a", "crypto-neon-fp-armv8", + AArch64::ExtensionBitset( + {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, + AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, + AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_PAUTH}), + "8.3-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( "apple-a13", "armv8.4-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( @@ -1580,18 +1598,17 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.4-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-a15", "armv8.6-a", "crypto-neon-fp-armv8", + "apple-m1", "armv8.4-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, - AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, - AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, - AArch64::AEK_PAUTH}), - "8.6-A"), + AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT, + AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), + "8.4-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-a16", "armv8.6-a", "crypto-neon-fp-armv8", + "apple-a15", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, @@ -1602,7 +1619,7 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-a17", "armv8.6-a", "crypto-neon-fp-armv8", + "apple-m2", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, @@ -1613,17 +1630,18 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-m1", "armv8.4-a", "crypto-neon-fp-armv8", + "apple-a16", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, - AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT, - AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), - "8.4-A"), + AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, + AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_PAUTH}), + "8.6-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-m2", "armv8.6-a", "crypto-neon-fp-armv8", + "apple-m3", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, @@ -1634,7 +1652,7 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-m3", "armv8.6-a", "crypto-neon-fp-armv8", + "apple-a17", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, @@ -1645,23 +1663,20 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-s4", "armv8.3-a", "crypto-neon-fp-armv8", - AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, - AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, - AArch64::AEK_PAUTH}), - "8.3-A"), - ARMCPUTestParams<AArch64::ExtensionBitset>( - "apple-s5", "armv8.3-a", "crypto-neon-fp-armv8", + "apple-m4", "armv8.7-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, - AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, - AArch64::AEK_PAUTH}), - "8.3-A"), + {AArch64::AEK_CRC, AArch64::AEK_AES, + AArch64::AEK_SHA2, AArch64::AEK_SHA3, + AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RDM, AArch64::AEK_RCPC, + AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_FP16FML, AArch64::AEK_BF16, + AArch64::AEK_I8MM, AArch64::AEK_JSCVT, + AArch64::AEK_FCMA, AArch64::AEK_PAUTH, + AArch64::AEK_SME, AArch64::AEK_SME2, + AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64}), + "8.7-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( "exynos-m3", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, @@ -1872,7 +1887,7 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams<AArch64::ExtensionBitset>::PrintToStringParamName); // Note: number of CPUs includes aliases. -static constexpr unsigned NumAArch64CPUArchs = 79; +static constexpr unsigned NumAArch64CPUArchs = 80; TEST(TargetParserTest, testAArch64CPUArchList) { SmallVector<StringRef, NumAArch64CPUArchs> List; `````````` </details> https://github.com/llvm/llvm-project/pull/95579 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
