llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: klensy (klensy) <details> <summary>Changes</summary> Moved fixes for clang from https://github.com/llvm/llvm-project/pull/91854, plus few additional in second commit. If your reviewed some tests, please merge them in separate PR; as collecting all r+ for all parts at once almost impossible. --- Patch is 399.46 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93193.diff 80 Files Affected: - (modified) clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp (+2-2) - (modified) clang/test/AST/ast-dump-decl.c (+4-4) - (modified) clang/test/Analysis/analyzer-checker-option-help.c (+20-20) - (modified) clang/test/Analysis/cast-value-notes.cpp (+2-2) - (modified) clang/test/CodeGen/64bit-swiftcall.c (+1-1) - (modified) clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c (+1-1) - (modified) clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c (+1-1) - (modified) clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c (+20-20) - (modified) clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c (+5-5) - (modified) clang/test/CodeGen/PowerPC/ppc-tmmintrin.c (+1-1) - (modified) clang/test/CodeGen/X86/avx-builtins.c (+2-2) - (modified) clang/test/CodeGen/X86/avx512vl-builtins.c (+2-2) - (modified) clang/test/CodeGen/X86/avx512vlbw-builtins.c (+4-4) - (modified) clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c (+8-8) - (modified) clang/test/CodeGen/arm-metadata.c (+1-1) - (modified) clang/test/CodeGen/arm-poly-add.c (+7-7) - (modified) clang/test/CodeGen/attr-mustprogress.c (+1-1) - (modified) clang/test/CodeGen/constantexpr-fneg.c (+1-1) - (modified) clang/test/CodeGen/debug-info-macro.c (+1-1) - (modified) clang/test/CodeGen/ffp-contract-option.c (+2-2) - (modified) clang/test/CodeGen/fp-floatcontrol-pragma.cpp (+3-3) - (modified) clang/test/CodeGen/fp16-ops-strictfp.c (+1-1) - (modified) clang/test/CodeGen/paren-list-agg-init.cpp (+1-1) - (modified) clang/test/CodeGen/regcall.c (+1-1) - (modified) clang/test/CodeGen/regcall4.c (+1-1) - (modified) clang/test/CodeGen/tbaa-class.cpp (+4-4) - (modified) clang/test/CodeGenCUDA/implicit-host-device-fun.cu (+4-4) - (modified) clang/test/CodeGenCXX/attr-mustprogress.cpp (+2-2) - (modified) clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp (+2-2) - (modified) clang/test/CodeGenCXX/cxx20-module-decomp-1.cpp (+1-1) - (modified) clang/test/CodeGenCXX/debug-info-nested-exprs.cpp (+1-1) - (modified) clang/test/CodeGenCXX/dllexport.cpp (+6-6) - (modified) clang/test/CodeGenCXX/dllimport.cpp (+3-3) - (modified) clang/test/CodeGenCXX/float16-declarations.cpp (+2-2) - (modified) clang/test/CodeGenCXX/mangle-class-nttp.cpp (+1-1) - (modified) clang/test/CodeGenCXX/mangle-nttp-anon-union.cpp (+1-1) - (modified) clang/test/CodeGenCXX/mangle-win-ccs.cpp (+2-2) - (modified) clang/test/CodeGenCXX/microsoft-abi-throw.cpp (+1-1) - (modified) clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp (+1-1) - (modified) clang/test/CodeGenCXX/runtime-dllstorage.cpp (+1-1) - (modified) clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp (+1-1) - (modified) clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp (+1-1) - (modified) clang/test/CodeGenCXX/vtable-assume-load.cpp (+1-1) - (modified) clang/test/CodeGenObjC/metadata-symbols-32.m (+1-1) - (modified) clang/test/CodeGenObjCXX/arc-blocks.mm (+2-2) - (modified) clang/test/CodeGenOpenCL/builtins-amdgcn.cl (+5-5) - (modified) clang/test/CodeGenOpenCL/builtins-r600.cl (+2-2) - (modified) clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl (+1-1) - (modified) clang/test/CodeGenOpenCL/opencl_types.cl (+2-2) - (modified) clang/test/Driver/avr-ld.c (+1-1) - (modified) clang/test/Driver/baremetal-sysroot.cpp (+1-1) - (modified) clang/test/Driver/baremetal.cpp (+3-3) - (modified) clang/test/Driver/cl-zc.cpp (+1-1) - (modified) clang/test/Driver/fsanitize-coverage.c (+1-1) - (modified) clang/test/Driver/fsanitize-ignorelist.c (+2-2) - (modified) clang/test/Driver/hip-toolchain-features.hip (+1-1) - (modified) clang/test/Driver/msp430-toolchain.c (+2-2) - (modified) clang/test/Driver/nacl-direct.c (+1-1) - (modified) clang/test/Driver/riscv-arch.c (+1-1) - (modified) clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c (+1-1) - (modified) clang/test/Driver/sanitizer-ld.c (+1-1) - (modified) clang/test/Driver/save-stats.c (+3-3) - (modified) clang/test/Driver/x86-mtune.c (+1-1) - (modified) clang/test/ExtractAPI/objc_property.m (+1-1) - (modified) clang/test/Headers/openmp_new_nothrow.cpp (+22-22) - (modified) clang/test/Misc/pragma-attribute-strict-subjects.c (+1-1) - (modified) clang/test/OpenMP/metadirective_implementation_codegen.c (+4-4) - (modified) clang/test/OpenMP/metadirective_implementation_codegen.cpp (+4-4) - (modified) clang/test/OpenMP/simd_codegen.cpp (+1-1) - (modified) clang/test/OpenMP/target_defaultmap_codegen_01.cpp (+2-2) - (modified) clang/test/OpenMP/target_map_codegen_06.cpp (+1-1) - (modified) clang/test/OpenMP/target_map_codegen_34.cpp (+1-1) - (modified) clang/test/OpenMP/target_map_codegen_35.cpp (+1-1) - (modified) clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp (+2219-2219) - (modified) clang/test/OpenMP/target_update_ast_print.cpp (+4-4) - (modified) clang/test/OpenMP/target_update_codegen.cpp (+1-1) - (modified) clang/test/Preprocessor/arm-target-features.c (+3-3) - (modified) clang/test/SemaCXX/lambda-conversion-op-cc.cpp (+7-7) - (modified) clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp (+1-1) - (modified) clang/test/SemaHLSL/standard_conversion_sequences.hlsl (+3-3) ``````````diff diff --git a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp index 89bf7f04f5576..6cf59f91016df 100644 --- a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp +++ b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp @@ -306,8 +306,8 @@ void gronk::bar(void) { // CHECK-MESSAGES: :[[@LINE-2]]:11: warning: {{.*}} in variable declaration // CHECK-FIXES: {{^ }}void (gronk::*p5){{$}} // CHECK-FIXES-NEXT: {{^ \($}} - // CHECK-FIXES-NExT: {{^ $}} - // CHECK-FIXES-NExT: {{^ \);$}} + // CHECK-FIXES-NEXT: {{^ $}} + // CHECK-FIXES-NEXT: {{^ \);$}} } // intentionally not LLVM style to check preservation of whitespace diff --git a/clang/test/AST/ast-dump-decl.c b/clang/test/AST/ast-dump-decl.c index 28b58c8eb648c..351d939f46d9c 100644 --- a/clang/test/AST/ast-dump-decl.c +++ b/clang/test/AST/ast-dump-decl.c @@ -73,7 +73,7 @@ enum TestEnumDeclForward; // CHECK: EnumDecl{{.*}} TestEnumDeclForward __module_private__ enum TestEnumDeclPrivate; -// CHECK-MODULE: EnumDecl{{.*}} TestEnumDeclPrivate __module_private__ +// CHECK-MODULES: EnumDecl{{.*}} TestEnumDeclPrivate __module_private__ struct TestRecordDecl { int i; @@ -103,7 +103,7 @@ struct TestRecordDeclForward; // CHECK: RecordDecl{{.*}} struct TestRecordDeclForward __module_private__ struct TestRecordDeclPrivate; -// CHECK-MODULE: RecordDecl{{.*}} struct TestRecordDeclPrivate __module_private__ +// CHECK-MODULES: RecordDecl{{.*}} struct TestRecordDeclPrivate __module_private__ enum testEnumConstantDecl { TestEnumConstantDecl, @@ -163,7 +163,7 @@ struct testFieldDecl { // CHECK-NEXT: ConstantExpr // CHECK-NEXT: value: Int 1 // CHECK-NEXT: IntegerLiteral -// CHECK-MODULE: FieldDecl{{.*}} TestFieldDeclPrivate 'int' __module_private__ +// CHECK-MODULES: FieldDecl{{.*}} TestFieldDeclPrivate 'int' __module_private__ int TestVarDecl; // CHECK: VarDecl{{.*}} TestVarDecl 'int' @@ -175,7 +175,7 @@ __thread int TestVarDeclThread; // CHECK: VarDecl{{.*}} TestVarDeclThread 'int' tls{{$}} __module_private__ int TestVarDeclPrivate; -// CHECK-MODULE: VarDecl{{.*}} TestVarDeclPrivate 'int' __module_private__ +// CHECK-MODULES: VarDecl{{.*}} TestVarDeclPrivate 'int' __module_private__ int TestVarDeclInit = 0; // CHECK: VarDecl{{.*}} TestVarDeclInit 'int' diff --git a/clang/test/Analysis/analyzer-checker-option-help.c b/clang/test/Analysis/analyzer-checker-option-help.c index 5f95569e58498..5e7531314f3ba 100644 --- a/clang/test/Analysis/analyzer-checker-option-help.c +++ b/clang/test/Analysis/analyzer-checker-option-help.c @@ -35,26 +35,26 @@ // // CHECK-STABLE: cplusplus.Move:WarnOn // CHECK-STABLE-SAME: (string) In non-aggressive mode, only warn -// CHECK-STABLLE: on use-after-move of local variables (or -// CHECK-STABLLE: local rvalue references) and of STL objects. -// CHECK-STABLLE: The former is possible because local variables -// CHECK-STABLLE: (or local rvalue references) are not tempting -// CHECK-STABLLE: their user to re-use the storage. The latter -// CHECK-STABLLE: is possible because STL objects are known -// CHECK-STABLLE: to end up in a valid but unspecified state -// CHECK-STABLLE: after the move and their state-reset methods -// CHECK-STABLLE: are also known, which allows us to predict -// CHECK-STABLLE: precisely when use-after-move is invalid. -// CHECK-STABLLE: Some STL objects are known to conform to -// CHECK-STABLLE: additional contracts after move, so they -// CHECK-STABLLE: are not tracked. However, smart pointers -// CHECK-STABLLE: specifically are tracked because we can -// CHECK-STABLLE: perform extra checking over them. In aggressive -// CHECK-STABLLE: mode, warn on any use-after-move because -// CHECK-STABLLE: the user has intentionally asked us to completely -// CHECK-STABLLE: eliminate use-after-move in his code. Values: -// CHECK-STABLLE: "KnownsOnly", "KnownsAndLocals", "All". -// CHECK-STABLLE: (default: KnownsAndLocals) +// CHECK-STABLE: on use-after-move of local variables (or +// CHECK-STABLE: local rvalue references) and of STL objects. +// CHECK-STABLE: The former is possible because local variables +// CHECK-STABLE: (or local rvalue references) are not tempting +// CHECK-STABLE: their user to re-use the storage. The latter +// CHECK-STABLE: is possible because STL objects are known +// CHECK-STABLE: to end up in a valid but unspecified state +// CHECK-STABLE: after the move and their state-reset methods +// CHECK-STABLE: are also known, which allows us to predict +// CHECK-STABLE: precisely when use-after-move is invalid. +// CHECK-STABLE: Some STL objects are known to conform to +// CHECK-STABLE: additional contracts after move, so they +// CHECK-STABLE: are not tracked. However, smart pointers +// CHECK-STABLE: specifically are tracked because we can +// CHECK-STABLE: perform extra checking over them. In aggressive +// CHECK-STABLE: mode, warn on any use-after-move because +// CHECK-STABLE: the user has intentionally asked us to completely +// CHECK-STABLE: eliminate use-after-move in his code. Values: +// CHECK-STABLE: "KnownsOnly", "KnownsAndLocals", "All". +// CHECK-STABLE: (default: KnownsAndLocals) // CHECK-STABLE-NOT: debug.AnalysisOrder:* // CHECK-DEVELOPER: debug.AnalysisOrder:* diff --git a/clang/test/Analysis/cast-value-notes.cpp b/clang/test/Analysis/cast-value-notes.cpp index 7ee224dc6e5d8..ea2d327369e03 100644 --- a/clang/test/Analysis/cast-value-notes.cpp +++ b/clang/test/Analysis/cast-value-notes.cpp @@ -77,8 +77,8 @@ void evalReferences(const Shape &S) { // expected-note@-2 {{Dereference of null pointer}} // expected-warning@-3 {{Dereference of null pointer}} clang_analyzer_printState(); - // XX86-CHECK: "dynamic_types": [ - // XX86-CHECK-NEXT: { "region": "SymRegion{reg_$0<const struct clang::Shape & S>}", "dyn_type": "const class clang::Circle &", "sub_classable": true } + // X86-CHECK: "dynamic_types": [ + // X86-CHECK-NEXT: { "region": "SymRegion{reg_$0<const struct clang::Shape & S>}", "dyn_type": "const class clang::Circle &", "sub_classable": true } (void)C; } #if defined(SUPPRESSED) diff --git a/clang/test/CodeGen/64bit-swiftcall.c b/clang/test/CodeGen/64bit-swiftcall.c index b1c42e3b0a657..226fe6dadd43a 100644 --- a/clang/test/CodeGen/64bit-swiftcall.c +++ b/clang/test/CodeGen/64bit-swiftcall.c @@ -1002,7 +1002,7 @@ typedef struct { TEST(padded_alloc_size_vector) // X86-64-LABEL: take_padded_alloc_size_vector(<3 x i32> %0, i64 %1) // X86-64-NOT: [4 x i8] -// x86-64: ret void +// X86-64: ret void typedef union { float f1; diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c index 90c28ddd316ee..948d48ad25036 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c @@ -535,7 +535,7 @@ void test1() { res_vi = vec_and(vbi, vi); // CHECK: and <4 x i32> -// CHECK-le: and <4 x i32> +// CHECK-LE: and <4 x i32> res_vi = vec_and(vi, vbi); // CHECK: and <4 x i32> diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c index 69ce9d6214e3c..7d4205ea127cd 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c @@ -1191,7 +1191,7 @@ void test1() { res_vsll = vec_neg(vsll); // CHECK: sub <2 x i64> zeroinitializer, {{%[0-9]+}} // CHECK-LE: sub <2 x i64> zeroinitializer, {{%[0-9]+}} -// CHECK_PPC: call to 'vec_neg' is ambiguous +// CHECK-PPC: call to 'vec_neg' is ambiguous } diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c index b55a522ed2608..932e234875ba1 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c @@ -996,30 +996,30 @@ vector bool long long test87(void) { } vector unsigned char test88(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <16 x i8> +// CHECK-BE-NEXT: ret <16 x i8> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <16 x i8> +// CHECK-NEXT: ret <16 x i8> return vec_xl_len(uc,0); } vector signed char test89(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <16 x i8> +// CHECK-BE-NEXT: ret <16 x i8> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <16 x i8> +// CHECK-NEXT: ret <16 x i8> return vec_xl_len(sc,0); } vector unsigned short test90(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <8 x i16> +// CHECK-BE-NEXT: ret <8 x i16> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <8 x i16> +// CHECK-NEXT: ret <8 x i16> return vec_xl_len(us,0); } vector signed short test91(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <8 x i16> +// CHECK-BE-NEXT: ret <8 x i16> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <8 x i16> +// CHECK-NEXT: ret <8 x i16> return vec_xl_len(ss,0); } vector unsigned int test92(void) { @@ -1040,49 +1040,49 @@ vector signed int test93(void) { vector float test94(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <4 x i32> +// CHECK-BE-NEXT: ret <4 x i32> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <4 x i32> +// CHECK-NEXT: ret <4 x i32> return vec_xl_len(f,0); } vector unsigned long long test95(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <2 x i64> +// CHECK-BE-NEXT: ret <2 x i64> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <2 x i64> +// CHECK-NEXT: ret <2 x i64> return vec_xl_len(ull,0); } vector signed long long test96(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <2 x i64> +// CHECK-BE-NEXT: ret <2 x i64> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <2 x i64> +// CHECK-NEXT: ret <2 x i64> return vec_xl_len(sll,0); } vector double test97(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <2 x i64> +// CHECK-BE-NEXT: ret <2 x i64> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <2 x i64> +// CHECK-NEXT: ret <2 x i64> return vec_xl_len(d,0); } vector unsigned __int128 test98(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <1 x i128> +// CHECK-BE-NEXT: ret <1 x i128> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <1 x i128> +// CHECK-NEXT: ret <1 x i128> return vec_xl_len(uint128,0); } vector signed __int128 test99(void) { // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-BE-NEXT-NEXT: ret <1 x i128> +// CHECK-BE-NEXT: ret <1 x i128> // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64 -// CHECK-NEXT-NEXT: ret <1 x i128> +// CHECK-NEXT: ret <1 x i128> return vec_xl_len(sint128,0); } diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c index 6030899a88357..5358d97f6506b 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c @@ -69,12 +69,12 @@ void test1() { res_vlll = vec_addc(vlll, vlll); // CHECK: @llvm.ppc.altivec.vaddcuq // CHECK-LE: @llvm.ppc.altivec.vaddcuq -// KCHECK-PPC: error: call to 'vec_addc' is ambiguous +// CHECK-PPC: error: call to 'vec_addc' is ambiguous res_vulll = vec_addc(vulll, vulll); // CHECK: @llvm.ppc.altivec.vaddcuq // CHECK-LE: @llvm.ppc.altivec.vaddcuq -// KCHECK-PPC: error: call to 'vec_addc' is ambiguous +// CHECK-PPC: error: call to 'vec_addc' is ambiguous /* vec_vaddcuq */ @@ -165,12 +165,12 @@ void test1() { res_vlll = vec_subc(vlll, vlll); // CHECK: @llvm.ppc.altivec.vsubcuq // CHECK-LE: @llvm.ppc.altivec.vsubcuq -// KCHECK-PPC: error: call to 'vec_subc' is ambiguous +// CHECK-PPC: error: call to 'vec_subc' is ambiguous res_vulll = vec_subc(vulll, vulll); // CHECK: @llvm.ppc.altivec.vsubcuq // CHECK-LE: @llvm.ppc.altivec.vsubcuq -// KCHECK-PPC: error: call to 'vec_subc' is ambiguous +// CHECK-PPC: error: call to 'vec_subc' is ambiguous res_vuc = vec_subc_u128(vuc, vuc); // CHECK: @llvm.ppc.altivec.vsubcuq @@ -219,7 +219,7 @@ void test1() { // CHECK-LE: store <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, ptr {{%.+}}, align 16 // CHECK-LE: xor <16 x i8> // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> {{%.+}}, <4 x i32> {{%.+}}, <16 x i8> {{%.+}}) -// CHECK_PPC: error: call to 'vec_revb' is ambiguous +// CHECK-PPC: error: call to 'vec_revb' is ambiguous /* vec_xl */ res_vlll = vec_xl(param_sll, ¶m_lll); diff --git a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c index 40d3839dcf026..fafdf4ed91e2e 100644 --- a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c +++ b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c @@ -71,7 +71,7 @@ test_alignr() { // CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) -// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) +// CHECK-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) // CHECK: store <16 x i8> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16 // CHECK: store <2 x i64> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16 diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c index 4bf1213d9fca9..2f80a31c585dc 100644 --- a/clang/test/CodeGen/X86/avx-builtins.c +++ b/clang/test/CodeGen/X86/avx-builtins.c @@ -1800,14 +1800,14 @@ void test_mm256_storeu_pd(double* A, __m256d B) { void test_mm256_storeu_ps(float* A, __m256 B) { // CHECK-LABEL: test_mm256_storeu_ps // CHECK: store <8 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}} - // CHECk-NEXT: ret void + // CHECK-NEXT: ret void _mm256_storeu_ps(A, B); } void test_mm256_storeu_si256(__m256i* A, __m256i B) { // CHECK-LABEL: test_mm256_storeu_si256 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} - // CHECk-NEXT: ret void + // CHECK-NEXT: ret void _mm256_storeu_si256(A, B); } diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c index 6f544c21e798d..edace2176c154 100644 --- a/clang/test/CodeGen/X86/avx512vl-builtins.c +++ b/clang/test/CodeGen/X86/avx512vl-builtins.c @@ -7021,8 +7021,8 @@ void test_mm256_mask_store_ps(void *__P, __mmask8 __U, __m256 __A) { } void test_mm_storeu_epi64(void *__p, __m128i __a) { - // check-label: @test_mm_storeu_epi64 - // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} + // CHECK-LABEL: @test_mm_storeu_epi64 + // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm_storeu_epi64(__p, __a); } diff --git a/clang/test/CodeGen/X86/avx512vlbw-builtins.c b/clang/test/CodeGen/X86/avx512vlbw-builtins.c index e2ce348d0e077..c95ddbec2e377 100644 --- a/clang/test/CodeGen/X86/avx512vlbw-builtins.c +++ b/clang/test/CodeGen/X86/avx512vlbw-builtins.c @@ -2569,8 +2569,8 @@ __m256i test_mm256_maskz_loadu_epi8(__mmask32 __U, void const *__P) { } void test_mm_storeu_epi16(void *__p, __m128i __a) { - // check-label: @test_mm_storeu_epi16 - // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} + // CHECK-LABEL: @test_mm_storeu_epi16 + // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm_storeu_epi16(__p, __a); } @@ -2593,8 +2593,8 @@ void test_mm256_mask_storeu_epi16(void *__P, __mmask16 __U, __m256i __A) { } void test_mm_storeu_epi8(void *__p, __m128i __a) { - // check-label: @test_mm_storeu_epi8 - // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} + // CHECK-LABEL: @test_mm_storeu_epi8 + // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm_storeu_epi8(__p, __a); } diff --git a/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c b/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c index f8c3a94133131..38c170bf168cf 100644 --- a/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c +++ b/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c @@ -153,10 +153,10 @@ bfloat16x4_t test_vreinterpret_bf16_p64(poly64x1_t a) { return vreinterpret_bf bfloat16x8_t test_vreinterpretq_bf16_p64(poly64x2_t a) { return vreinterpretq_bf16_p64(a); } // TODO: poly128_t not implemented on aarch32 -// CHCK-LABEL: @test_vreinterpretq_bf16_p128( -// CHCK-NEXT: entry: -// CHCK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <4 x i32> -// CHCK-NEXT: ret <4 x i32> [[TMP0]] +// COM: CHECK-LABEL: @test_vreinterpretq_bf16_p128( +// COM: CHECK-NEXT: entry: +// COM: CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <4 x i32> +// COM: CHECK-NEXT: ret <4 x i32> [[TMP0]] // //bfloat16x8_t test_vreinterpretq_bf16_p128(poly128_t a) { return vreinterpretq_bf16_p128(a); } @@ -306,9 +306,9 @@ int64x2_t test_vreinterpretq_s64_bf16(bfloat16x8_t a) { return vreinterpretq_ poly64x2_t test_vreinterpretq_p64_bf16(bfloat16x8_t a) { return vreinterpretq_p64_bf16(a); } // TODO: poly128_t not implemented on aarch32 -// CHCK-LABEL: @test_vreinterpretq_p128_bf16( -// CHCK-NEXT: entry: -// CHCK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to i128 -// CHCK-NEXT: ret i128 [[TMP0]] +// COM: CHECK-LABEL: @test_vreinterpretq_p128_bf16( +// COM: CHECK-NEXT: entry: +// COM: CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to i128 +// COM: CHECK-NEXT: ret i128 [[TMP0]] // //poly128_t test_vreinterpretq_p128_bf16(bfloat16x8_t a) { return vreinterpretq_p128_bf16(a); } diff --git a/clang/test/CodeGen/arm-metadata.c b/clang/test/CodeGen/arm-metadata.c index 4f3e2dba219b6..93e50e80dd2ce 100644 --- a/clang/test/CodeGen/arm-metadata.c +++ b/clang/test/CodeGen/arm-metadata.c @@ -8,5 +8,5 @@ // SHORT-WCHAR: !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 2} // SHORT-WCHAR: !{{[0-9]+}} = !{i32 1, !"min_enum_size", i32 4} -// SHORT_ENUM: !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 4} +// SHORT-ENUM: !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 4} // SHORT-ENUM: !{{[0-9]+}} = !{i32 1, !"min_enum_size", i32 1} diff --git a/clang/test/CodeGen/arm-poly-add.c b/clang/test/CodeGen/arm-poly-add.c index 201a03a5bc8b6..b782ef01b00f7 100644 --- a/clang/test/CodeGen/arm-poly-add.c +++ b/clang/test/CodeGen/arm-poly-add.c @@ -74,13 +74,13 @@ poly64x2_t test_vaddq_p64(poly64x2_t a, poly64x2_t b){ } // TODO: poly128_t not implemented on aarch32 -// CHCK-LABEL: @test_vaddq_p128( -// CHCK-NEXT: entry: -// CHCK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <16 x i8> -// CHCK-NEXT: [[TMP1:%.*]] = bitcast i128 [[B:%.*]] to <16 x i8> -// CHCK-NEXT: [[TMP2:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]] -// CHCK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to i128 -// CHCK-NEXT: ret i128 [[TMP3]] +// COM: CHECK-LABEL: @test_vaddq_p128( +// COM: CHECK-NEXT: entry: +// COM: CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <16 x i8> +// COM: CHECK-NEXT: [[TMP1:%.*]] = bitcast i128 [[B:%.*]] to <16 x i8> +// COM: CHECK-NEXT: [[TMP2:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]] +// COM: CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to i128 +// COM: CHECK-NEXT: ret i1... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/93193 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
