redstar wrote: The lines you are trying to match are:
``` call void @_Z6MakeVRffff(ptr dead_on_unwind writable sret(<4 x float>) align 16 %tmp, float noundef %0, float noundef %1, float noundef %2, float noundef %3) %4 = load <4 x float>, ptr %tmp, align 16 store <4 x float> %4, ptr @_ZN21VectorSinConstantsSSE1AE, align 16 ``` I am not sure what is the best way to integrate that into the patterns. https://github.com/llvm/llvm-project/pull/92353 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
