llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: YunQiang Su (wzssyqa) <details> <summary>Changes</summary> FP32 is the only supported FPMode of mips1. FPXX requires MIPS2+ and FP64 requires MIPS32r2+. --- Full diff: https://github.com/llvm/llvm-project/pull/92122.diff 1 Files Affected: - (modified) clang/lib/Basic/Targets/Mips.h (+8-3) ``````````diff diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h index 730deb674aa57..f76c6ece8bf48 100644 --- a/clang/lib/Basic/Targets/Mips.h +++ b/clang/lib/Basic/Targets/Mips.h @@ -85,8 +85,13 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo { return CPU == "mips32r6" || CPU == "mips64r6"; } - bool isFP64Default() const { - return CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64"; + enum FPModeEnum getDefaultFPMode() const { + if (CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64") + return FP64; + else if (CPU == "mips1") + return FP32; + else + return FPXX; } bool isNan2008() const override { return IsNan2008; } @@ -315,8 +320,8 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo { IsSingleFloat = false; FloatABI = HardFloat; DspRev = NoDSP; - FPMode = isFP64Default() ? FP64 : FPXX; NoOddSpreg = false; + FPMode = getDefaultFPMode(); bool OddSpregGiven = false; bool StrictAlign = false; `````````` </details> https://github.com/llvm/llvm-project/pull/92122 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
