================ @@ -1942,12 +1942,10 @@ def : RWSysReg<"PM", 0b11, 0b000, 0b0100, 0b0011, 0b001>; // 2023 ISA Extension // AArch64 Floating-point Mode Register controls behaviors of the FP8 -// instructions (FEAT_FPMR) ---------------- tmatheson-arm wrote:
The comment `(FEAT_FPMR)` should stay, because it is still true even if we are not going to gate the registers by feature. https://github.com/llvm/llvm-project/pull/90612 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
