Zeson added a comment. In https://reviews.llvm.org/D27251#609014, @nemanjai wrote:
> Thank you for fixing these issues. I certainly see how the shifts really need > to get the signedness right because the right shifts need to fill with the > sign bit (so that vector bool will still have all 0 or all 1 bits). However, > I don't really follow why the comparisons need to be signed. Could you just > elaborate a bit on that? > Other than satisfying my curiosity on that, this LGTM. In my opinion, from the table in the PDF above, it seems that vector bool would be treated as unsigned or signed depending on the other argument type and it would be mapped to related machine instruction. As machine instruction, it is just treated as signed or unsigned operand. F2627693: Screen Shot 2016-11-30 at 9.54.40 PM.png <https://reviews.llvm.org/F2627693> https://reviews.llvm.org/D27251 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
