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<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang-codegen @llvm/pr-subscribers-backend-x86 @llvm/pr-subscribers-clang Author: Maciej Gabka (mgabka) <details> <summary>Changes</summary> This patch is moving out following intrinsics: * vector.interleave2/deinterleave2 * vector.revert * vector.splice from the experimental namespace. All these intrinsics exist in LLVM for more than a year now, and are widly used, so should not be considered as experimental. --- Patch is 918.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/88748.diff 92 Files Affected: - (modified) clang/lib/CodeGen/CGExprScalar.cpp (+1-1) - (modified) llvm/docs/LangRef.rst (+22-22) - (modified) llvm/docs/ReleaseNotes.rst (+5) - (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+2-2) - (modified) llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h (+2-2) - (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+2-2) - (modified) llvm/include/llvm/IR/Intrinsics.td (+4-4) - (modified) llvm/include/llvm/IR/PatternMatch.h (+1-1) - (modified) llvm/lib/Analysis/InstructionSimplify.cpp (+3-3) - (modified) llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp (+13-17) - (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+5-5) - (modified) llvm/lib/CodeGen/InterleavedAccessPass.cpp (+2-2) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+4-4) - (modified) llvm/lib/IR/AutoUpgrade.cpp (+19) - (modified) llvm/lib/IR/IRBuilder.cpp (+2-4) - (modified) llvm/lib/IR/Instructions.cpp (+1-1) - (modified) llvm/lib/IR/Verifier.cpp (+1-1) - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+2-2) - (modified) llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (+1-1) - (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-2) - (modified) llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp (+1-1) - (modified) llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (+2-2) - (modified) llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp (+2-2) - (modified) llvm/lib/Transforms/InstCombine/InstructionCombining.cpp (+2-2) - (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+6-7) - (modified) llvm/test/Analysis/CostModel/AArch64/getIntrinsicInstrCost-vector-reverse.ll (+48-48) - (modified) llvm/test/Analysis/CostModel/AArch64/splice.ll (+86-86) - (modified) llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll (+328-328) - (modified) llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll (+125-125) - (modified) llvm/test/Analysis/CostModel/RISCV/splice.ll (+196-196) - (added) llvm/test/Bitcode/upgrade-vector-interleave2-deinterleave2-intrinsics.ll (+46) - (added) llvm/test/Bitcode/upgrade-vector-reverse-intrinsic.ll (+24) - (added) llvm/test/Bitcode/upgrade-vector-splice-intrinsic.ll (+24) - (modified) llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll (+2-2) - (modified) llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll (+2-2) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-contract.ll (+26-26) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-fast.ll (+26-26) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add-scalable.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul-scalable.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-add-scalable.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-mul-scalable.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-add-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-mul-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-add-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-mul-scalable.ll (+18-18) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-i8-add-scalable.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll (+13-13) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll (+10-10) - (modified) llvm/test/CodeGen/AArch64/complex-deinterleaving-splat-scalable.ll (+8-8) - (modified) llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll (+20-20) - (modified) llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-neon.ll (+26-26) - (modified) llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll (+42-42) - (modified) llvm/test/CodeGen/AArch64/named-vector-shuffles-neon.ll (+15-15) - (modified) llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll (+82-82) - (modified) llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll (+38-38) - (modified) llvm/test/CodeGen/AArch64/sve-vector-interleave.ll (+38-38) - (modified) llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll (+23-23) - (modified) llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll (+21-21) - (modified) llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse-bitrotate.ll (+2-2) - (modified) llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll (+94-94) - (modified) llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll (+92-92) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll (+22-22) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll (+27-27) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll (+38-38) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll (+20-20) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll (+25-25) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll (+40-40) - (modified) llvm/test/CodeGen/RISCV/rvv/vector-splice.ll (+206-206) - (modified) llvm/test/CodeGen/X86/named-vector-shuffle-reverse.ll (+19-19) - (modified) llvm/test/Transforms/InstCombine/vector-reverse.ll (+146-146) - (modified) llvm/test/Transforms/InstSimplify/named-vector-shuffle-reverse.ll (+4-4) - (modified) llvm/test/Transforms/InstSimplify/select.ll (+3-3) - (modified) llvm/test/Transforms/InterleavedAccess/AArch64/fixed-deinterleave-intrinsics.ll (+48-48) - (modified) llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll (+34-34) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll (+3-3) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll (+4-4) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll (+24-24) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll (+8-8) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll (+12-12) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll (+5-5) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll (+1-1) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll (+2-2) - (modified) llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll (+1-1) - (modified) llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll (+4-4) - (modified) llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll (+6-6) - (modified) llvm/test/Verifier/invalid-splice.ll (+7-7) ``````````diff diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..b89eacd4fc72ee 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2321,7 +2321,7 @@ Value *ScalarExprEmitter::VisitCastExpr(CastExpr *CE) { } // Perform VLAT <-> VLST bitcast through memory. - // TODO: since the llvm.experimental.vector.{insert,extract} intrinsics + // TODO: since the llvm.vector.{insert,extract} intrinsics // require the element types of the vectors to be the same, we // need to keep this around for bitcasts between VLAT <-> VLST where // the element types of the vectors are not the same, until we figure diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst index 9592929d79feb4..f0d99664bd4c3b 100644 --- a/llvm/docs/LangRef.rst +++ b/llvm/docs/LangRef.rst @@ -18770,7 +18770,7 @@ runtime, then the result vector is a :ref:`poison value <poisonvalues>`. The ``idx`` parameter must be a vector index constant type (for most targets this will be an integer pointer type). -'``llvm.experimental.vector.reverse``' Intrinsic +'``llvm.vector.reverse``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Syntax: @@ -18779,13 +18779,13 @@ This is an overloaded intrinsic. :: - declare <2 x i8> @llvm.experimental.vector.reverse.v2i8(<2 x i8> %a) - declare <vscale x 4 x i32> @llvm.experimental.vector.reverse.nxv4i32(<vscale x 4 x i32> %a) + declare <2 x i8> @llvm.vector.reverse.v2i8(<2 x i8> %a) + declare <vscale x 4 x i32> @llvm.vector.reverse.nxv4i32(<vscale x 4 x i32> %a) Overview: """"""""" -The '``llvm.experimental.vector.reverse.*``' intrinsics reverse a vector. +The '``llvm.vector.reverse.*``' intrinsics reverse a vector. The intrinsic takes a single vector and returns a vector of matching type but with the original lane order reversed. These intrinsics work for both fixed and scalable vectors. While this intrinsic is marked as experimental the @@ -18797,7 +18797,7 @@ Arguments: The argument to this intrinsic must be a vector. -'``llvm.experimental.vector.deinterleave2``' Intrinsic +'``llvm.vector.deinterleave2``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Syntax: @@ -18806,13 +18806,13 @@ This is an overloaded intrinsic. :: - declare {<2 x double>, <2 x double>} @llvm.experimental.vector.deinterleave2.v4f64(<4 x double> %vec1) - declare {<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.experimental.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> %vec1) + declare {<2 x double>, <2 x double>} @llvm.vector.deinterleave2.v4f64(<4 x double> %vec1) + declare {<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32> %vec1) Overview: """"""""" -The '``llvm.experimental.vector.deinterleave2``' intrinsic constructs two +The '``llvm.vector.deinterleave2``' intrinsic constructs two vectors by deinterleaving the even and odd lanes of the input vector. This intrinsic works for both fixed and scalable vectors. While this intrinsic @@ -18824,7 +18824,7 @@ For example: .. code-block:: text - {<2 x i64>, <2 x i64>} llvm.experimental.vector.deinterleave2.v4i64(<4 x i64> <i64 0, i64 1, i64 2, i64 3>); ==> {<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>} + {<2 x i64>, <2 x i64>} llvm.vector.deinterleave2.v4i64(<4 x i64> <i64 0, i64 1, i64 2, i64 3>); ==> {<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>} Arguments: """""""""" @@ -18832,7 +18832,7 @@ Arguments: The argument is a vector whose type corresponds to the logical concatenation of the two result types. -'``llvm.experimental.vector.interleave2``' Intrinsic +'``llvm.vector.interleave2``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Syntax: @@ -18841,13 +18841,13 @@ This is an overloaded intrinsic. :: - declare <4 x double> @llvm.experimental.vector.interleave2.v4f64(<2 x double> %vec1, <2 x double> %vec2) - declare <vscale x 8 x i32> @llvm.experimental.vector.interleave2.nxv8i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2) + declare <4 x double> @llvm.vector.interleave2.v4f64(<2 x double> %vec1, <2 x double> %vec2) + declare <vscale x 8 x i32> @llvm.vector.interleave2.nxv8i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2) Overview: """"""""" -The '``llvm.experimental.vector.interleave2``' intrinsic constructs a vector +The '``llvm.vector.interleave2``' intrinsic constructs a vector by interleaving two input vectors. This intrinsic works for both fixed and scalable vectors. While this intrinsic @@ -18859,7 +18859,7 @@ For example: .. code-block:: text - <4 x i64> llvm.experimental.vector.interleave2.v4i64(<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>); ==> <4 x i64> <i64 0, i64 1, i64 2, i64 3> + <4 x i64> llvm.vector.interleave2.v4i64(<2 x i64> <i64 0, i64 2>, <2 x i64> <i64 1, i64 3>); ==> <4 x i64> <i64 0, i64 1, i64 2, i64 3> Arguments: """""""""" @@ -18905,7 +18905,7 @@ The '``llvm.experimental.cttz.elts``' intrinsic counts the trailing (least significant) zero elements in a vector. If ``src == 0`` the result is the number of elements in the input vector. -'``llvm.experimental.vector.splice``' Intrinsic +'``llvm.vector.splice``' Intrinsic ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Syntax: @@ -18914,13 +18914,13 @@ This is an overloaded intrinsic. :: - declare <2 x double> @llvm.experimental.vector.splice.v2f64(<2 x double> %vec1, <2 x double> %vec2, i32 %imm) - declare <vscale x 4 x i32> @llvm.experimental.vector.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm) + declare <2 x double> @llvm.vector.splice.v2f64(<2 x double> %vec1, <2 x double> %vec2, i32 %imm) + declare <vscale x 4 x i32> @llvm.vector.splice.nxv4i32(<vscale x 4 x i32> %vec1, <vscale x 4 x i32> %vec2, i32 %imm) Overview: """"""""" -The '``llvm.experimental.vector.splice.*``' intrinsics construct a vector by +The '``llvm.vector.splice.*``' intrinsics construct a vector by concatenating elements from the first input vector with elements of the second input vector, returning a vector of the same type as the input vectors. The signed immediate, modulo the number of elements in the vector, is the index @@ -18939,8 +18939,8 @@ For example: .. code-block:: text - llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, 1); ==> <B, C, D, E> index - llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, -3); ==> <B, C, D, E> trailing elements + llvm.vector.splice(<A,B,C,D>, <E,F,G,H>, 1); ==> <B, C, D, E> index + llvm.vector.splice(<A,B,C,D>, <E,F,G,H>, -3); ==> <B, C, D, E> trailing elements Arguments: @@ -22163,7 +22163,7 @@ Overview: """"""""" The '``llvm.experimental.vp.splice.*``' intrinsic is the vector length -predicated version of the '``llvm.experimental.vector.splice.*``' intrinsic. +predicated version of the '``llvm.vector.splice.*``' intrinsic. Arguments: """""""""" @@ -22222,7 +22222,7 @@ Overview: """"""""" The '``llvm.experimental.vp.reverse.*``' intrinsic is the vector length -predicated version of the '``llvm.experimental.vector.reverse.*``' intrinsic. +predicated version of the '``llvm.vector.reverse.*``' intrinsic. Arguments: """""""""" diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 11add9274a7a07..c11a59c1ebc08e 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -50,6 +50,11 @@ Update on required toolchains to build LLVM Changes to the LLVM IR ---------------------- +* Renamed ``llvm.experimental.vector.reverse`` intrinsic to ``llvm.vector.reverse``. +* Renamed ``llvm.experimental.vector.splice`` intrinsic to ``llvm.vector.splice``. +* Renamed ``llvm.experimental.vector.interleave2`` intrinsic to ``llvm.vector.interleave2``. +* Renamed ``llvm.experimental.vector.deinterleave2`` intrinsic to ``llvm.vector.deinterleave2``. + Changes to LLVM infrastructure ------------------------------ diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h index 06a19c75cf873a..d111684e2b0018 100644 --- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h +++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h @@ -1662,12 +1662,12 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> { TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()), std::nullopt, CostKind, Index, cast<VectorType>(Args[1]->getType())); } - case Intrinsic::experimental_vector_reverse: { + case Intrinsic::vector_reverse: { return thisT()->getShuffleCost( TTI::SK_Reverse, cast<VectorType>(Args[0]->getType()), std::nullopt, CostKind, 0, cast<VectorType>(RetTy)); } - case Intrinsic::experimental_vector_splice: { + case Intrinsic::vector_splice: { unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue(); return thisT()->getShuffleCost( TTI::SK_Splice, cast<VectorType>(Args[0]->getType()), std::nullopt, diff --git a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h index 5f28908e998a9b..deae2c55d26e27 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h @@ -247,8 +247,8 @@ class IRTranslator : public MachineFunctionPass { bool translateTrap(const CallInst &U, MachineIRBuilder &MIRBuilder, unsigned Opcode); - // Translate @llvm.experimental.vector.interleave2 and - // @llvm.experimental.vector.deinterleave2 intrinsics for fixed-width vector + // Translate @llvm.vector.interleave2 and + // @llvm.vector.deinterleave2 intrinsics for fixed-width vector // types into vector shuffles. bool translateVectorInterleave2Intrinsic(const CallInst &CI, MachineIRBuilder &MIRBuilder); diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index e0ade02959025f..69a59bcc215595 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -3140,7 +3140,7 @@ class TargetLoweringBase { /// Lower a deinterleave intrinsic to a target specific load intrinsic. /// Return true on success. Currently only supports - /// llvm.experimental.vector.deinterleave2 + /// llvm.vector.deinterleave2 /// /// \p DI is the deinterleave intrinsic. /// \p LI is the accompanying load instruction @@ -3151,7 +3151,7 @@ class TargetLoweringBase { /// Lower an interleave intrinsic to a target specific store intrinsic. /// Return true on success. Currently only supports - /// llvm.experimental.vector.interleave2 + /// llvm.vector.interleave2 /// /// \p II is the interleave intrinsic. /// \p SI is the accompanying store instruction diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td index bdd8465883fcff..c709fe5eab3b84 100644 --- a/llvm/include/llvm/IR/Intrinsics.td +++ b/llvm/include/llvm/IR/Intrinsics.td @@ -2550,11 +2550,11 @@ def int_preserve_static_offset : DefaultAttrsIntrinsic<[llvm_ptr_ty], //===------------ Intrinsics to perform common vector shuffles ------------===// -def int_experimental_vector_reverse : DefaultAttrsIntrinsic<[llvm_anyvector_ty], +def int_vector_reverse : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>; -def int_experimental_vector_splice : DefaultAttrsIntrinsic<[llvm_anyvector_ty], +def int_vector_splice : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty], @@ -2573,12 +2573,12 @@ def int_vector_extract : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>; -def int_experimental_vector_interleave2 : DefaultAttrsIntrinsic<[llvm_anyvector_ty], +def int_vector_interleave2 : DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMHalfElementsVectorType<0>, LLVMHalfElementsVectorType<0>], [IntrNoMem]>; -def int_experimental_vector_deinterleave2 : DefaultAttrsIntrinsic<[LLVMHalfElementsVectorType<0>, +def int_vector_deinterleave2 : DefaultAttrsIntrinsic<[LLVMHalfElementsVectorType<0>, LLVMHalfElementsVectorType<0>], [llvm_anyvector_ty], [IntrNoMem]>; diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h index 92cb79d54afc29..8b0b52c69d6629 100644 --- a/llvm/include/llvm/IR/PatternMatch.h +++ b/llvm/include/llvm/IR/PatternMatch.h @@ -2498,7 +2498,7 @@ inline typename m_Intrinsic_Ty<Opnd0, Opnd1>::Ty m_CopySign(const Opnd0 &Op0, template <typename Opnd0> inline typename m_Intrinsic_Ty<Opnd0>::Ty m_VecReverse(const Opnd0 &Op0) { - return m_Intrinsic<Intrinsic::experimental_vector_reverse>(Op0); + return m_Intrinsic<Intrinsic::vector_reverse>(Op0); } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp index 4e6e666922671d..c8e1e925518440 100644 --- a/llvm/lib/Analysis/InstructionSimplify.cpp +++ b/llvm/lib/Analysis/InstructionSimplify.cpp @@ -6285,11 +6285,11 @@ static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0, m_Intrinsic<Intrinsic::pow>(m_SpecificFP(10.0), m_Value(X))))) return X; break; - case Intrinsic::experimental_vector_reverse: - // experimental.vector.reverse(experimental.vector.reverse(x)) -> x + case Intrinsic::vector_reverse: + // vector.reverse(vector.reverse(x)) -> x if (match(Op0, m_VecReverse(m_Value(X)))) return X; - // experimental.vector.reverse(splat(X)) -> splat(X) + // vector.reverse(splat(X)) -> splat(X) if (isSplatValue(Op0)) return Op0; break; diff --git a/llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp b/llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp index 031a271de5bd75..8573b016d1e5bb 100644 --- a/llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp +++ b/llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp @@ -1639,8 +1639,7 @@ bool ComplexDeinterleavingGraph::checkNodes() { ComplexDeinterleavingGraph::NodePtr ComplexDeinterleavingGraph::identifyRoot(Instruction *RootI) { if (auto *Intrinsic = dyn_cast<IntrinsicInst>(RootI)) { - if (Intrinsic->getIntrinsicID() != - Intrinsic::experimental_vector_interleave2) + if (Intrinsic->getIntrinsicID() != Intrinsic::vector_interleave2) return nullptr; auto *Real = dyn_cast<Instruction>(Intrinsic->getOperand(0)); @@ -1675,7 +1674,7 @@ ComplexDeinterleavingGraph::identifyDeinterleave(Instruction *Real, Value *FinalValue = nullptr; if (match(Real, m_ExtractValue<0>(m_Instruction(I))) && match(Imag, m_ExtractValue<1>(m_Specific(I))) && - match(I, m_Intrinsic<Intrinsic::experimental_vector_deinterleave2>( + match(I, m_Intrinsic<Intrinsic::vector_deinterleave2>( m_Value(FinalValue)))) { NodePtr PlaceholderNode = prepareCompositeNode( llvm::ComplexDeinterleavingOperation::Deinterleave, Real, Imag); @@ -1960,13 +1959,11 @@ Value *ComplexDeinterleavingGraph::replaceNode(IRBuilderBase &Builder, // Splats that are not constant are interleaved where they are located Instruction *InsertPoint = (I->comesBefore(R) ? R : I)->getNextNode(); IRBuilder<> IRB(InsertPoint); - ReplacementNode = - IRB.CreateIntrinsic(Intrinsic::experimental_vector_interleave2, NewTy, - {Node->Real, Node->Imag}); + ReplacementNode = IRB.CreateIntrinsic(Intrinsic::vector_interleave2, + NewTy, {Node->Real, Node->Imag}); } else { - ReplacementNode = - Builder.CreateIntrinsic(Intrinsic::experimental_vector_interleave2, - NewTy, {Node->Real, Node->Imag}); + ReplacementNode = Builder.CreateIntrinsic( + Intrinsic::vector_interleave2, NewTy, {Node->Real, Node->Imag}); } break; } @@ -1991,9 +1988,8 @@ Value *ComplexDeinterleavingGraph::replaceNode(IRBuilderBase &Builder, auto *B = replaceNode(Builder, Node->Operands[1]); auto *NewMaskTy = VectorType::getDoubleElementsVectorType( cast<VectorType>(MaskReal->getType())); - auto *NewMask = - Builder.CreateIntrinsic(Intrinsic::experimental_vector_interleave2, - NewMaskTy, {MaskReal, MaskImag}); + auto *NewMask = Builder.CreateIntrinsic(Intrinsic::vector_interleave2, + NewMaskTy, {MaskReal, MaskImag}); ReplacementNode = Builder.CreateSelect(NewMask, A, B); break; } @@ -2021,8 +2017,8 @@ void ComplexDeinterleavingGraph::processReductionOperation( Value *InitImag = OldPHIImag->getIncomingValueForBlock(Incoming); IRBuilder<> Builder(Incoming->getTerminator()); - auto *NewInit = Builder.CreateIntrinsic( - Intrinsic::experimental_vector_interleave2, NewVTy, {InitReal, InitImag}); + auto *NewInit = Builder.CreateIntrinsic(Intrinsic::vector_interleave2, NewVTy, + {InitReal, InitImag}); NewPHI->addIncoming(NewInit, Incoming); NewPHI->addIncoming(OperationReplacement, BackEdge); @@ -2034,9 +2030,9 @@ void ComplexDeinterleavingGraph::processReductionOperation( Builder.SetInsertPoint( &*FinalReductionReal->getParent()->getFirstInsertionPt()); - auto *Deinterleave = Builder.CreateIntrinsic( - Intrinsic::experimental_vector_deinterleave2, - OperationReplacement->getType(), OperationReplacement); + auto *Deinterleave = Builder.CreateIntrinsic(Intrinsic::vector_deinterleave2, + OperationReplacement->getType(), + OperationReplacement); auto *NewReal = Builder.CreateExtractValue(Deinterleave, (uint64_t)0); FinalReductionReal->replaceUsesOfWith(Real, NewReal); diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 9b4575f7f34d47..96a66226d18262 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1804,7 +1804,7 @@ bool IRTranslator::translateTrap(const CallInst &CI, bool IRTranslator::translateVectorInterleave2Intrinsic( const CallInst &CI, MachineIRBuilder &MIRBuilder) { - assert(CI.getIntrinsicID() == Intrinsic::experimental_vector_interleave2 && + assert(CI.getIntrinsicID() == Intrinsic::vector_interleave2 && "This function can only be called on the interleave2 intrinsic!"); // Canonicalize interleave2 to G_SHUFFLE_VECTOR (similar to SelectionDAG). Register Op0 = getOrCreateVReg(*CI.getOperand(0)); @@ -1820,7 +1820,7 @@ bool IRTranslator::translateVectorInterleave2Intrinsic( bool IRTranslator::translateVectorDeinterleave2Intrinsic( const CallInst &CI, MachineIRBuilder &MIRBuilder) { - assert(CI.getIntrinsicID() == Intrinsic::experimental_vector_deinterleave2 && + assert(CI.getIntrinsicID() == Intrinsic::vector_deinterleave2 && "This function can only be called on the deinterleave2 intrinsic!"); // Canonicalize deinterleave2 to shuffles that extract sub-vectors (similar to // SelectionDAG). @@ -2570,15 +2570,15 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID, return true; } - case Intrinsic::experimental_vector_interleave2: - case Intrinsic::experimental_vector_deinterleave2: { + case Intrinsic::vector_interleave2: + case Intrinsic::vector_deinterleave2: { // Both intrinsics have ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/88748 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
