================
@@ -173,6 +167,13 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
diag::warn_target_unsupported_branch_protection_attribute)
<< Attr.CPU;
}
+ } else if (CGM.getTarget().isBranchProtectionSupportedArch(
+ CGM.getTarget().getTargetOpts().CPU)) {
+ TargetInfo::BranchProtectionInfo BPI(CGM.getLangOpts());
+ if (BPI.SignReturnAddr != LangOptions::SignReturnAddressScopeKind::None)
+ Fn->addFnAttr("sign-return-address", BPI.getSignReturnAddrStr());
+ if (BPI.BranchTargetEnforcement)
+ Fn->addFnAttr("branch-target-enforcement", "true");
----------------
nickdesaulniers wrote:
> Consider adding a `getBranchTargetEnforcementStr` method to
> `BranchProtectionInfo` to encapsulate this.
Looks like that might also be useful in the child commit
https://github.com/llvm/llvm-project/pull/83277 ?
https://github.com/llvm/llvm-project/pull/82819
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