coby created this revision.
coby added reviewers: craig.topper, m_zuckerman, igorb, delena, AsafBadouh.
coby added a subscriber: cfe-commits.
coby set the repository for this revision to rL LLVM.
The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it.
This is the clang part, llvm side is accessible here:
https://reviews.llvm.org/D26257
Repository:
rL LLVM
https://reviews.llvm.org/D26258
Files:
include/clang/Basic/BuiltinsX86.def
lib/Headers/avx512vbmiintrin.h
lib/Headers/avx512vbmivlintrin.h
Index: lib/Headers/avx512vbmiintrin.h
===================================================================
--- lib/Headers/avx512vbmiintrin.h
+++ lib/Headers/avx512vbmiintrin.h
@@ -107,27 +107,27 @@
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_multishift_epi64_epi8 (__m512i __W, __mmask64 __M, __m512i __X, __m512i __Y)
{
- return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
- (__v64qi) __Y,
- (__v64qi) __W,
+ return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) __W,
(__mmask64) __M);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_multishift_epi64_epi8 (__mmask64 __M, __m512i __X, __m512i __Y)
{
- return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
- (__v64qi) __Y,
- (__v64qi) _mm512_setzero_si512 (),
+ return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) _mm512_setzero_si512 (),
(__mmask64) __M);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_multishift_epi64_epi8 (__m512i __X, __m512i __Y)
{
- return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
- (__v64qi) __Y,
- (__v64qi) _mm512_undefined_epi32 (),
+ return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) _mm512_undefined_epi32 (),
(__mmask64) -1);
}
Index: lib/Headers/avx512vbmivlintrin.h
===================================================================
--- lib/Headers/avx512vbmivlintrin.h
+++ lib/Headers/avx512vbmivlintrin.h
@@ -186,57 +186,57 @@
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_multishift_epi64_epi8 (__m128i __W, __mmask16 __M, __m128i __X, __m128i __Y)
{
- return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
- (__v16qi) __Y,
- (__v16qi) __W,
+ return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v2di) __X,
+ (__v2di) __Y,
+ (__v2di) __W,
(__mmask16) __M);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_multishift_epi64_epi8 (__mmask16 __M, __m128i __X, __m128i __Y)
{
- return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
- (__v16qi) __Y,
- (__v16qi)
+ return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v2di) __X,
+ (__v2di) __Y,
+ (__v2di)
_mm_setzero_si128 (),
(__mmask16) __M);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_multishift_epi64_epi8 (__m128i __X, __m128i __Y)
{
- return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
- (__v16qi) __Y,
- (__v16qi)
+ return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v2di) __X,
+ (__v2di) __Y,
+ (__v2di)
_mm_undefined_si128 (),
(__mmask16) -1);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_multishift_epi64_epi8 (__m256i __W, __mmask32 __M, __m256i __X, __m256i __Y)
{
- return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
- (__v32qi) __Y,
- (__v32qi) __W,
+ return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v4di) __X,
+ (__v4di) __Y,
+ (__v4di) __W,
(__mmask32) __M);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_multishift_epi64_epi8 (__mmask32 __M, __m256i __X, __m256i __Y)
{
- return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
- (__v32qi) __Y,
- (__v32qi)
+ return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v4di) __X,
+ (__v4di) __Y,
+ (__v4di)
_mm256_setzero_si256 (),
(__mmask32) __M);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_multishift_epi64_epi8 (__m256i __X, __m256i __Y)
{
- return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
- (__v32qi) __Y,
- (__v32qi)
+ return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v4di) __X,
+ (__v4di) __Y,
+ (__v4di)
_mm256_undefined_si256 (),
(__mmask32) -1);
}
Index: include/clang/Basic/BuiltinsX86.def
===================================================================
--- include/clang/Basic/BuiltinsX86.def
+++ include/clang/Basic/BuiltinsX86.def
@@ -2043,9 +2043,9 @@
TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dULLiIi","","avx512f")
TARGET_BUILTIN(__builtin_ia32_cvtusi2ss32, "V4fV4fUiIi","","avx512f")
TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fULLiIi","","avx512f")
-TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb512_mask, "V64cV64cV64cV64cULLi","","avx512vbmi")
-TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb128_mask, "V16cV16cV16cV16cUs","","avx512vbmi,avx512vl")
-TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb256_mask, "V32cV32cV32cV32cUi","","avx512vbmi,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb512_mask, "V8LLiV8LLiV8LLiV8LLiULLi","","avx512vbmi")
+TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb128_mask, "V2LLiV2LLiV2LLiV2LLiUs","","avx512vbmi,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb256_mask, "V4LLiV4LLiV4LLiV4LLiUi","","avx512vbmi,avx512vl")
// generic select intrinsics
TARGET_BUILTIN(__builtin_ia32_selectb_128, "V16cUsV16cV16c", "", "")
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
