================
@@ -326,6 +326,48 @@ InstructionCost
RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
switch (Kind) {
default:
break;
+ case TTI::SK_ExtractSubvector:
+ if (isa<FixedVectorType>(SubTp) &&
+ LT.second.getVectorElementType() != MVT::i1) {
+ unsigned TpRegs = getRegUsageForType(Tp);
+ unsigned NumElems =
+ divideCeil(Tp->getElementCount().getFixedValue(), TpRegs);
+ // Whole vector extract - just the vector itself + (possible) vsetvli.
+ // TODO: consider adding the cost for vsetvli.
+ if (Index == 0 || (ST->getRealMaxVLen() == ST->getRealMinVLen() &&
+ NumElems * LT.second.getScalarSizeInBits() ==
+ ST->getRealMinVLen() &&
+ Index % NumElems == 0))
----------------
lukel97 wrote:
Should we add some test cases that exercise the exact VLEN path? I presume
we'll need to add another RUN line with `-riscv-v-vector-bits-min=...
-riscv-v-vector-bits-max=...`
https://github.com/llvm/llvm-project/pull/80164
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