Author: Sander de Smalen Date: 2024-02-02T09:29:47Z New Revision: 9e649518e6038a5b9ea38cfa424468657d3be59e
URL: https://github.com/llvm/llvm-project/commit/9e649518e6038a5b9ea38cfa424468657d3be59e DIFF: https://github.com/llvm/llvm-project/commit/9e649518e6038a5b9ea38cfa424468657d3be59e.diff LOG: [Clang][AArch64] Add missing SME macros (#80293) __ARM_STATE_ZA and __ARM_STATE_ZT0 are set when the compiler can parse the "za" and "zt0" strings in the SME attributes. __ARM_FEATURE_SME and __ARM_FEATURE_SME2 are set when the compiler can generate code for attributes with "za" and "zt0" state, respectively. __ARM_FEATURE_LOCALLY_STREAMING is set when the compiler supports the __arm_locally_streaming attribute. Added: Modified: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AArch64.h clang/test/Preprocessor/aarch64-target-features.c clang/test/Preprocessor/init-aarch64.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index d2c06f7191bfc..68032961451d9 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -386,6 +386,11 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("__ARM_ALIGN_MAX_STACK_PWR", "4"); + // These macros are set when Clang can parse declarations with these + // attributes. + Builder.defineMacro("__ARM_STATE_ZA", "1"); + Builder.defineMacro("__ARM_STATE_ZT0", "1"); + // 0xe implies support for half, single and double precision operations. if (FPU & FPUMode) Builder.defineMacro("__ARM_FP", "0xE"); @@ -430,6 +435,17 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, if (HasSVE2 && HasSVE2SM4) Builder.defineMacro("__ARM_FEATURE_SVE2_SM4", "1"); + if (HasSME) { + Builder.defineMacro("__ARM_FEATURE_SME"); + Builder.defineMacro("__ARM_FEATURE_LOCALLY_STREAMING", "1"); + } + + if (HasSME2) { + Builder.defineMacro("__ARM_FEATURE_SME"); + Builder.defineMacro("__ARM_FEATURE_SME2"); + Builder.defineMacro("__ARM_FEATURE_LOCALLY_STREAMING", "1"); + } + if (HasCRC) Builder.defineMacro("__ARM_FEATURE_CRC32", "1"); @@ -692,6 +708,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { .Case("sve2-sha3", FPU & SveMode && HasSVE2SHA3) .Case("sve2-sm4", FPU & SveMode && HasSVE2SM4) .Case("sme", HasSME) + .Case("sme2", HasSME2) .Case("sme-f64f64", HasSMEF64F64) .Case("sme-i16i64", HasSMEI16I64) .Case("sme-fa64", HasSMEFA64) @@ -812,6 +829,12 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features, HasBFloat16 = true; HasFullFP16 = true; } + if (Feature == "+sme2") { + HasSME = true; + HasSME2 = true; + HasBFloat16 = true; + HasFullFP16 = true; + } if (Feature == "+sme-f64f64") { HasSME = true; HasSMEF64F64 = true; diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index 7761812295ffa..26ee7fa197825 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -68,6 +68,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool HasCCDP = false; bool HasFRInt3264 = false; bool HasSME = false; + bool HasSME2 = false; bool HasSMEF64F64 = false; bool HasSMEI16I64 = false; bool HasSB = false; diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index 43402225f0689..41fb26e04ef69 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -60,6 +60,10 @@ // CHECK-NOT: __ARM_FEATURE_SVE_BITS 512 // CHECK-NOT: __ARM_FEATURE_SVE_BITS 1024 // CHECK-NOT: __ARM_FEATURE_SVE_BITS 2048 +// CHECK: __ARM_STATE_ZA 1 +// CHECK: __ARM_STATE_ZT0 1 +// CHECK-NOT: __ARM_FEATURE_SME +// CHECK-NOT: __ARM_FEATURE_SME2 // RUN: %clang -target aarch64-none-elf -march=armv8-r -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-R-PROFILE // RUN: %clang -target arm64-none-linux-gnu -march=armv8-r -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-R-PROFILE @@ -672,3 +676,12 @@ // RUN: %clang --target=aarch64 -march=armv8.2-a+rcpc3 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-RCPC3 %s // CHECK-RCPC3: __ARM_FEATURE_RCPC 3 + +// RUN: %clang --target=aarch64 -march=armv9-a+sme -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SME %s +// CHECK-SME: __ARM_FEATURE_LOCALLY_STREAMING 1 +// CHECK-SME: __ARM_FEATURE_SME 1 +// +// RUN: %clang --target=aarch64 -march=armv9-a+sme2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SME2 %s +// CHECK-SME2: __ARM_FEATURE_LOCALLY_STREAMING 1 +// CHECK-SME2: __ARM_FEATURE_SME 1 +// CHECK-SME2: __ARM_FEATURE_SME2 1 diff --git a/clang/test/Preprocessor/init-aarch64.c b/clang/test/Preprocessor/init-aarch64.c index f1f1bbbf66945..cf96870b27acb 100644 --- a/clang/test/Preprocessor/init-aarch64.c +++ b/clang/test/Preprocessor/init-aarch64.c @@ -32,6 +32,8 @@ // AARCH64-NEXT: #define __ARM_PCS_AAPCS64 1 // AARCH64-NEXT: #define __ARM_SIZEOF_MINIMAL_ENUM 4 // AARCH64-NEXT: #define __ARM_SIZEOF_WCHAR_T 4 +// AARCH64-NEXT: #define __ARM_STATE_ZA 1 +// AARCH64-NEXT: #define __ARM_STATE_ZT0 1 // AARCH64-NEXT: #define __ATOMIC_ACQUIRE 2 // AARCH64-NEXT: #define __ATOMIC_ACQ_REL 4 // AARCH64-NEXT: #define __ATOMIC_CONSUME 1 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
