================ @@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">; def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">; } + +// Zvfbfmin - Vector convert BF16 to FP32 +let Log2LMUL = [-2, -1, 0, 1, 2], + OverloadedName = "vfwcvtbf16_f" in +defm : RVVConvBuiltinSet<"vfwcvtbf16_f_f_v", "y", [["Fw", "Fwv"]]>; ---------------- tclin914 wrote:
Could we just use `RVVConvBuiltin` here. Like `def vfwcvtbf16_f_f_v : RVVConvBuiltin<"Fw", "Fwv", "y", "vfwcvtbf16_f">;` https://github.com/llvm/llvm-project/pull/79618 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits