================
@@ -305,6 +305,11 @@ class VOP3OpSel_gfx10<bits<10> op, VOPProfile p> : 
VOP3e_gfx10<op, p> {
 
 class VOP3OpSel_gfx11_gfx12<bits<10> op, VOPProfile p> : VOP3OpSel_gfx10<op, 
p>;
 
+class VOP3FP8OpSel_gfx11_gfx12<bits<10> op, VOPProfile p> : VOP3e_gfx10<op, p> 
{
+  let Inst{11} = !if(p.HasSrc0, src0_modifiers{2}, 0);
+  let Inst{12} = !if(p.HasSrc0, src0_modifiers{3}, 0);
----------------
mbrkusanin wrote:

https://github.com/llvm/llvm-project/pull/79122 <- This should help with the 
tests in llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir



https://github.com/llvm/llvm-project/pull/78414
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