================
@@ -29,6 +29,12 @@ namespace llvm {
class StringRef;
class SparcSubtarget : public SparcGenSubtargetInfo {
+ // Reserve*Register[i] - *#i is not available as a general purpose register.
+ BitVector ReserveGRegister;
----------------
s-barannikov wrote:
Can this be a single `BitVector` indexed by physical register number? This
would simplify `TRI.getReservedRegs()`, I think.
https://github.com/llvm/llvm-project/pull/74927
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