================ @@ -561,6 +561,16 @@ def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), [(set GR64:$dst, (load addr:$src))]>; } +def : Pat<(or (and GR64:$dst, -256), ---------------- david-xl wrote:
32bit move has implicit zero extension, so won't be applicable. Moved the change to X86InstrCompiler.td https://github.com/llvm/llvm-project/pull/75978 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits