================
@@ -3656,8 +3656,8 @@ bool SIInstrInfo::areMemAccessesTriviallyDisjoint(const
MachineInstr &MIa,
// underlying address space, even if it was lowered to a different one,
// e.g. private accesses lowered to use MUBUF instructions on a scratch
// buffer.
- if (isDS(MIa)) {
- if (isDS(MIb))
+ if (isDS(MIa) || isLDSDMA(MIa)) {
+ if (isDS(MIb) || isLDSDMA(MIb))
return checkInstOffsetsDoNotOverlap(MIa, MIb);
----------------
rampitec wrote:
It does, even though it just bails. It goes down to
getMemOperandsWithOffsetWidth and there it bails on the LDS DMA:
```
449│ // Get appropriate operand, and compute width accordingly.
450│ DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst);
451│ if (DataOpIdx == -1)
452│ DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdata);
453│ if (DataOpIdx == -1) // LDS DMA
454│ return false;
```
In principle these offsets are analyzable. This is a typical store memop:
```
(dereferenceable store (s32) into `ptr addrspace(3) getelementptr inbounds
(%llvm.amdgcn.kernel.buffer_load_lds_dword_2_ar
rays.lds.t, ptr addrspace(3)
@llvm.amdgcn.kernel.buffer_load_lds_dword_2_arrays.lds, i32 0, i32 1)
```
But is you want I can bail right here.
https://github.com/llvm/llvm-project/pull/75249
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