Author: Justin Bogner Date: 2023-12-09T12:33:32-08:00 New Revision: 02e02b9a8f0e22ffc0d6c070b132a88e94f02861
URL: https://github.com/llvm/llvm-project/commit/02e02b9a8f0e22ffc0d6c070b132a88e94f02861 DIFF: https://github.com/llvm/llvm-project/commit/02e02b9a8f0e22ffc0d6c070b132a88e94f02861.diff LOG: [HLSL] Define RasterizerOrderedBuffer resource Define HLSL's RasterizerOrderedBuffer resource type through the external sema source. This doesn't fully work as is, but defining it allows us to exercise the ROV logic in the DirectX backend from HLSL rather than having to manually edit metadata, so it's useful for further testing and development. Pull Request: https://github.com/llvm/llvm-project/pull/74897 Added: clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl Modified: clang/lib/Sema/HLSLExternalSemaSource.cpp Removed: ################################################################################ diff --git a/clang/lib/Sema/HLSLExternalSemaSource.cpp b/clang/lib/Sema/HLSLExternalSemaSource.cpp index d0e4ab8ba85766..1a1febf7a35241 100644 --- a/clang/lib/Sema/HLSLExternalSemaSource.cpp +++ b/clang/lib/Sema/HLSLExternalSemaSource.cpp @@ -116,11 +116,11 @@ struct BuiltinTypeDeclBuilder { } BuiltinTypeDeclBuilder &annotateResourceClass(ResourceClass RC, - ResourceKind RK) { + ResourceKind RK, bool IsROV) { if (Record->isCompleteDefinition()) return *this; Record->addAttr(HLSLResourceAttr::CreateImplicit(Record->getASTContext(), - RC, RK, /*IsROV=*/false)); + RC, RK, IsROV)); return *this; } @@ -478,12 +478,12 @@ void HLSLExternalSemaSource::defineTrivialHLSLTypes() { /// Set up common members and attributes for buffer types static BuiltinTypeDeclBuilder setupBufferType(CXXRecordDecl *Decl, Sema &S, - ResourceClass RC, - ResourceKind RK) { + ResourceClass RC, ResourceKind RK, + bool IsROV) { return BuiltinTypeDeclBuilder(Decl) .addHandleMember() .addDefaultHandleConstructor(S, RC) - .annotateResourceClass(RC, RK); + .annotateResourceClass(RC, RK, IsROV); } void HLSLExternalSemaSource::defineHLSLTypesWithForwardDeclarations() { @@ -493,7 +493,18 @@ void HLSLExternalSemaSource::defineHLSLTypesWithForwardDeclarations() { .Record; onCompletion(Decl, [this](CXXRecordDecl *Decl) { setupBufferType(Decl, *SemaPtr, ResourceClass::UAV, - ResourceKind::TypedBuffer) + ResourceKind::TypedBuffer, /*IsROV=*/false) + .addArraySubscriptOperators() + .completeDefinition(); + }); + + Decl = + BuiltinTypeDeclBuilder(*SemaPtr, HLSLNamespace, "RasterizerOrderedBuffer") + .addSimpleTemplateParams({"element_type"}) + .Record; + onCompletion(Decl, [this](CXXRecordDecl *Decl) { + setupBufferType(Decl, *SemaPtr, ResourceClass::UAV, + ResourceKind::TypedBuffer, /*IsROV=*/true) .addArraySubscriptOperators() .completeDefinition(); }); diff --git a/clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl b/clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl new file mode 100644 index 00000000000000..ce7d84ecf5b147 --- /dev/null +++ b/clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl @@ -0,0 +1,20 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-pixel -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s + +RasterizerOrderedBuffer<float> Buffer1; +RasterizerOrderedBuffer<vector<float, 4> > BufferArray[4]; + +RasterizerOrderedBuffer<float> Buffer2 : register(u3); +RasterizerOrderedBuffer<vector<float, 4> > BufferArray2[4] : register(u4); + +RasterizerOrderedBuffer<float> Buffer3 : register(u3, space1); +RasterizerOrderedBuffer<vector<float, 4> > BufferArray3[4] : register(u4, space1); + +void main() {} + +// CHECK: !hlsl.uavs = !{![[Single:[0-9]+]], ![[Array:[0-9]+]], ![[SingleAllocated:[0-9]+]], ![[ArrayAllocated:[0-9]+]], ![[SingleSpace:[0-9]+]], ![[ArraySpace:[0-9]+]]} +// CHECK-DAG: ![[Single]] = !{ptr @"?Buffer1@@3V?$RasterizerOrderedBuffer@M@hlsl@@A", !"RasterizerOrderedBuffer<float>", i32 10, i1 true, i32 -1, i32 0} +// CHECK-DAG: ![[Array]] = !{ptr @"?BufferArray@@3PAV?$RasterizerOrderedBuffer@T?$__vector@M$03@__clang@@@hlsl@@A", !"RasterizerOrderedBuffer<vector<float, 4> >", i32 10, i1 true, i32 -1, i32 0} +// CHECK-DAG: ![[SingleAllocated]] = !{ptr @"?Buffer2@@3V?$RasterizerOrderedBuffer@M@hlsl@@A", !"RasterizerOrderedBuffer<float>", i32 10, i1 true, i32 3, i32 0} +// CHECK-DAG: ![[ArrayAllocated]] = !{ptr @"?BufferArray2@@3PAV?$RasterizerOrderedBuffer@T?$__vector@M$03@__clang@@@hlsl@@A", !"RasterizerOrderedBuffer<vector<float, 4> >", i32 10, i1 true, i32 4, i32 0} +// CHECK-DAG: ![[SingleSpace]] = !{ptr @"?Buffer3@@3V?$RasterizerOrderedBuffer@M@hlsl@@A", !"RasterizerOrderedBuffer<float>", i32 10, i1 true, i32 3, i32 1} +// CHECK-DAG: ![[ArraySpace]] = !{ptr @"?BufferArray3@@3PAV?$RasterizerOrderedBuffer@T?$__vector@M$03@__clang@@@hlsl@@A", !"RasterizerOrderedBuffer<vector<float, 4> >", i32 10, i1 true, i32 4, i32 1} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
