[clang] [AArch64][SME2] Remove IsPreservesZA from ldr_zt builtin (PR #74303)

[Sander de Smalen via cfe-commits]

================
@@ -319,7 +319,7 @@ let TargetGuard = "sme2" in {
 // Spill and fill of ZT0
 //
 let TargetGuard = "sme2" in {
-  def SVLDR_ZT : Inst<"svldr_zt", "viQ", "", MergeNone, "aarch64_sme_ldr_zt", 
[IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA], 
[ImmCheck<0, ImmCheck0_0>]>;
+  def SVLDR_ZT : Inst<"svldr_zt", "viQ", "", MergeNone, "aarch64_sme_ldr_zt", 
[IsOverloadNone, IsStreamingCompatible, IsSharedZA], [ImmCheck<0, 
ImmCheck0_0>]>;
   def SVSTR_ZT : Inst<"svstr_zt", "vi%", "", MergeNone, "aarch64_sme_str_zt", 
[IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA], 
[ImmCheck<0, ImmCheck0_0>]>;
----------------
sdesmalen-arm wrote:

I don't think so, because that only stores ZT0 to memory, so doesn't write to 
ZT0.

https://github.com/llvm/llvm-project/pull/74303
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