[clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #68932)

[Jay Foad via cfe-commits]

================
@@ -1708,6 +1710,19 @@ bool 
SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
     }
 
     ++Iter;
+    if (ST->isPreciseMemoryEnabled() && Inst.mayLoadOrStore()) {
+      auto Builder =
+          BuildMI(Block, Iter, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
+              .addImm(0);
+      if (IsGFX10Plus) {
----------------
jayfoad wrote:

Yes but why? On GFX10+, why would you put s_waitcnt(0) after a store or 
s_waitcnt_vscnt(0) after a load?

https://github.com/llvm/llvm-project/pull/68932
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits