Author: Lucas Duarte Prates Date: 2023-11-16T15:38:32Z New Revision: 59b2301508ecd97175f4093039bbf887f6d5b484
URL: https://github.com/llvm/llvm-project/commit/59b2301508ecd97175f4093039bbf887f6d5b484 DIFF: https://github.com/llvm/llvm-project/commit/59b2301508ecd97175f4093039bbf887f6d5b484.diff LOG: [AArch64] Introduce the Armv9.5-A architecture version (#72392) This introduces the Armv9.5-A architecture version, including the relevant command-line option for -march. Mode details about the Armv9.5-A architecture version can be found at: * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2023 * https://developer.arm.com/documentation/ddi0602/2023-09/ Patch by Oliver Stannard. Added: clang/test/Driver/aarch64-v95a.c Modified: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AArch64.h clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Preprocessor/aarch64-target-features.c llvm/include/llvm/TargetParser/AArch64TargetParser.h llvm/include/llvm/TargetParser/Triple.h llvm/lib/Target/AArch64/AArch64.td llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/TargetParser/ARMTargetParserCommon.cpp llvm/unittests/TargetParser/TargetParserTest.cpp Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index c71af71eba60ce2..fde220163805554 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -333,6 +333,12 @@ void AArch64TargetInfo::getTargetDefinesARMV94A(const LangOptions &Opts, getTargetDefinesARMV89A(Opts, Builder); } +void AArch64TargetInfo::getTargetDefinesARMV95A(const LangOptions &Opts, + MacroBuilder &Builder) const { + // Armv9.5-A does not have a v8.* equivalent, but is a superset of v9.4-A. + getTargetDefinesARMV94A(Opts, Builder); +} + void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { // Target identification. @@ -565,6 +571,8 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, getTargetDefinesARMV93A(Opts, Builder); else if (*ArchInfo == llvm::AArch64::ARMV9_4A) getTargetDefinesARMV94A(Opts, Builder); + else if (*ArchInfo == llvm::AArch64::ARMV9_5A) + getTargetDefinesARMV95A(Opts, Builder); // All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8) builtins work. Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1"); @@ -899,6 +907,9 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features, if (Feature == "+v9.4a" && ArchInfo->Version < llvm::AArch64::ARMV9_4A.Version) ArchInfo = &llvm::AArch64::ARMV9_4A; + if (Feature == "+v9.5a" && + ArchInfo->Version < llvm::AArch64::ARMV9_5A.Version) + ArchInfo = &llvm::AArch64::ARMV9_5A; if (Feature == "+v8r") ArchInfo = &llvm::AArch64::ARMV8R; if (Feature == "+fullfp16") { diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index 4304693e473dee3..9ccc637f5494784 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -143,6 +143,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { MacroBuilder &Builder) const; void getTargetDefinesARMV94A(const LangOptions &Opts, MacroBuilder &Builder) const; + void getTargetDefinesARMV95A(const LangOptions &Opts, + MacroBuilder &Builder) const; void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp index 276984f96d57a51..1f77c987051749c 100644 --- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -411,6 +411,7 @@ void aarch64::getAArch64TargetFeatures(const Driver &D, else if (*I == "+v9.2a") V9Version = 2; else if (*I == "+v9.3a") V9Version = 3; else if (*I == "+v9.4a") V9Version = 4; + else if (*I == "+v9.5a") V9Version = 5; else if (*I == "+sm4") HasSM4 = true; else if (*I == "+sha3") HasSHA3 = true; else if (*I == "+sha2") HasSHA2 = true; diff --git a/clang/test/Driver/aarch64-v95a.c b/clang/test/Driver/aarch64-v95a.c new file mode 100644 index 000000000000000..6044a4f155db02c --- /dev/null +++ b/clang/test/Driver/aarch64-v95a.c @@ -0,0 +1,15 @@ +// RUN: %clang -target aarch64 -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// RUN: %clang -target aarch64 -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s +// GENERICV95A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" +// RUN: %clang -target aarch64_be -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// RUN: %clang -target aarch64_be -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s +// GENERICV95A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" + diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index 55bf3c74e96da06..db89aa7b608ad5f 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -207,6 +207,7 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9.4-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s +// RUN: %clang -target aarch64-none-linux-gnu -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE2 %s // CHECK-SVE2: __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-SVE2: __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 @@ -599,6 +600,7 @@ // RUN: %clang -target aarch64-none-elf -march=armv9.1-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // RUN: %clang -target aarch64-none-elf -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s +// RUN: %clang -target aarch64-none-elf -march=armv9.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER,CHECK-V85-OR-LATER %s // CHECK-V81-OR-LATER: __ARM_FEATURE_ATOMICS 1 // CHECK-V85-OR-LATER: __ARM_FEATURE_BTI 1 // CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1 diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index c2f9bb290271353..4505f6e8c5da620 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -376,6 +376,7 @@ inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))}; inline constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))}; +inline constexpr ArchInfo ARMV9_5A = { VersionTuple{9, 5}, AProfile, "armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts)}; // For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions. inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (ARMV8_5A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_SSBS, @@ -383,10 +384,10 @@ inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", // clang-format on // The set of all architectures -static constexpr std::array<const ArchInfo *, 16> ArchInfos = { +static constexpr std::array<const ArchInfo *, 17> ArchInfos = { &ARMV8A, &ARMV8_1A, &ARMV8_2A, &ARMV8_3A, &ARMV8_4A, &ARMV8_5A, - &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A, &ARMV9_1A, - &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV8R, + &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A, &ARMV9_1A, + &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV9_5A, &ARMV8R, }; // Details of a specific CPU. diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h index 414b86d53aff6b3..47904621c0967fe 100644 --- a/llvm/include/llvm/TargetParser/Triple.h +++ b/llvm/include/llvm/TargetParser/Triple.h @@ -112,6 +112,7 @@ class Triple { enum SubArchType { NoSubArch, + ARMSubArch_v9_5a, ARMSubArch_v9_4a, ARMSubArch_v9_3a, ARMSubArch_v9_2a, diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 06ab560ce4108e1..dd2ae3e701146de 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -687,6 +687,10 @@ def HasV9_4aOps : SubtargetFeature< "v9.4a", "HasV9_4aOps", "true", "Support ARM v9.4a instructions", [HasV8_9aOps, HasV9_3aOps]>; +def HasV9_5aOps : SubtargetFeature< + "v9.5a", "HasV9_5aOps", "true", "Support ARM v9.5a instructions", + [HasV9_4aOps]>; + def HasV8_0rOps : SubtargetFeature< "v8r", "HasV8_0rOps", "true", "Support ARM v8r instructions", [//v8.1 diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index ec9a62eec55bae0..9fb48eced695d57 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3696,6 +3696,8 @@ static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) { Str += "ARMv9.3a"; else if (FBS[AArch64::HasV9_4aOps]) Str += "ARMv9.4a"; + else if (FBS[AArch64::HasV9_5aOps]) + Str += "ARMv9.5a"; else if (FBS[AArch64::HasV8_0rOps]) Str += "ARMv8r"; else { diff --git a/llvm/lib/TargetParser/ARMTargetParserCommon.cpp b/llvm/lib/TargetParser/ARMTargetParserCommon.cpp index ba517d6cf1bc60e..907ee5957c7c9cc 100644 --- a/llvm/lib/TargetParser/ARMTargetParserCommon.cpp +++ b/llvm/lib/TargetParser/ARMTargetParserCommon.cpp @@ -44,6 +44,7 @@ StringRef ARM::getArchSynonym(StringRef Arch) { .Case("v9.2a", "v9.2-a") .Case("v9.3a", "v9.3-a") .Case("v9.4a", "v9.4-a") + .Case("v9.5a", "v9.5-a") .Case("v8m.base", "v8-m.base") .Case("v8m.main", "v8-m.main") .Case("v8.1m.main", "v8.1-m.main") diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 6b85ee0ff664b84..68cb4823048eebd 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -1619,6 +1619,8 @@ TEST(TargetParserTest, testAArch64Arch) { ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9.4-a", "generic", "v9.4a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testAArch64Arch("armv9.5-a", "generic", "v9.5a", + ARMBuildAttrs::CPUArch::v8_A)); } bool testAArch64Extension(StringRef CPUName, StringRef ArchExt) { @@ -1857,6 +1859,7 @@ TEST(TargetParserTest, AArch64ArchFeatures) { EXPECT_EQ(AArch64::ARMV9_2A.ArchFeature, "+v9.2a"); EXPECT_EQ(AArch64::ARMV9_3A.ArchFeature, "+v9.3a"); EXPECT_EQ(AArch64::ARMV9_4A.ArchFeature, "+v9.4a"); + EXPECT_EQ(AArch64::ARMV9_5A.ArchFeature, "+v9.5a"); EXPECT_EQ(AArch64::ARMV8R.ArchFeature, "+v8r"); } @@ -1884,8 +1887,9 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) { }) EXPECT_TRUE(A->implies(AArch64::ARMV8A)); - for (const auto *A : {&AArch64::ARMV9_1A, &AArch64::ARMV9_2A, - &AArch64::ARMV9_3A, &AArch64::ARMV9_4A}) + for (const auto *A : + {&AArch64::ARMV9_1A, &AArch64::ARMV9_2A, &AArch64::ARMV9_3A, + &AArch64::ARMV9_4A, &AArch64::ARMV9_5A}) EXPECT_TRUE(A->implies(AArch64::ARMV9A)); EXPECT_TRUE(AArch64::ARMV8_1A.implies(AArch64::ARMV8A)); @@ -1902,6 +1906,7 @@ TEST(TargetParserTest, AArch64ArchPartialOrder) { EXPECT_TRUE(AArch64::ARMV9_2A.implies(AArch64::ARMV9_1A)); EXPECT_TRUE(AArch64::ARMV9_3A.implies(AArch64::ARMV9_2A)); EXPECT_TRUE(AArch64::ARMV9_4A.implies(AArch64::ARMV9_3A)); + EXPECT_TRUE(AArch64::ARMV9_5A.implies(AArch64::ARMV9_4A)); EXPECT_TRUE(AArch64::ARMV9A.implies(AArch64::ARMV8_5A)); EXPECT_TRUE(AArch64::ARMV9_1A.implies(AArch64::ARMV8_6A)); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
