================
@@ -1970,17 +1969,20 @@ def SVBFMLSLT_LANE : SInst<"svbfmlslt_lane[_{d}]",
"dd$$i", "f", MergeNone, "aar
let TargetGuard = "sve2p1" in {
def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone,
"aarch64_sve_sclamp", [], []>;
def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone,
"aarch64_sve_uclamp", [], []>;
-
def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc", MergeNone, "", [], []>;
def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "", [], []>;
def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "", [], []>;
def SVPSEL_D : SInst<"svpsel_lane_b64", "PPPm", "Pl", MergeNone, "", [], []>;
-def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone,
"aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>;
-
defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUl", "aarch64_sve_revd">;
}
+let TargetGuard = "sve2p1|sme2" in {
+ def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone,
"aarch64_sve_fclamp", [IsStreamingCompatible], []>;
+ def SVFCLAMP_BF : SInst<"svclamp[_{d}]", "dddd", "b", MergeNone,
"aarch64_sve_fclamp", [IsStreamingCompatible], []>;
----------------
sdesmalen-arm wrote:
SVFCLAMP_BF should additionally be predicated under +b16b16 which is optionally
available with SVE2 or SME2.
https://github.com/llvm/llvm-project/pull/72487
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