================ @@ -425,29 +414,41 @@ bool GCNRewritePartialRegUses::rewriteReg(Register Reg) const { return false; for (MachineOperand &MO : Range) { - if (MO.getSubReg() == AMDGPU::NoSubRegister) // Whole reg used, quit. + if (MO.getSubReg() == AMDGPU::NoSubRegister) // Whole reg used, quit. [1] return false; } auto *RC = MRI->getRegClass(Reg); LLVM_DEBUG(dbgs() << "Try to rewrite partial reg " << printReg(Reg, TRI) << ':' << TRI->getRegClassName(RC) << '\n'); - // Collect used subregs and constrained reg classes infered from instruction + // Collect used subregs and their reg classes infered from instruction // operands. SubRegMap SubRegs; for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) { ---------------- vpykhtin wrote:
Done. https://github.com/llvm/llvm-project/pull/69957 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits