github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 18bb9725619569687bec2c013768511105266a5e
9846bc9efd79e6e3c2662ea42367c102df88799d --
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index c011a46cf02a..abfe14e52509 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -326,7 +326,8 @@ public:
return false;
}
- template <unsigned BaseReg, unsigned Max> bool ImmToTile(SDValue N, SDValue
&Imm) {
+ template <unsigned BaseReg, unsigned Max>
+ bool ImmToTile(SDValue N, SDValue &Imm) {
if (auto *CI = dyn_cast<ConstantSDNode>(N)) {
uint64_t C = CI->getZExtValue();
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index c6ff3f1ce6a3..7404e04b8ea2 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2754,12 +2754,11 @@ MachineBasicBlock
*AArch64TargetLowering::EmitZTSpillFill(MachineInstr &MI,
if (IsSpill) {
MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STR_TX));
MIB.addReg(MI.getOperand(0).getReg());
- }
- else
+ } else
MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::LDR_TX),
MI.getOperand(0).getReg());
MIB.add(MI.getOperand(1)); // Base
- MI.eraseFromParent(); // The pseudo is gone now.
+ MI.eraseFromParent(); // The pseudo is gone now.
return BB;
}
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index af2181c0791b..0b4dde5e4d19 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -442,7 +442,7 @@ AArch64RegisterInfo::getStrictlyReservedRegs(const
MachineFunction &MF) const {
if (MF.getSubtarget<AArch64Subtarget>().hasSME2()) {
for (MCSubRegIterator SubReg(AArch64::ZT0, this, /*self=*/true);
- SubReg.isValid(); ++SubReg)
+ SubReg.isValid(); ++SubReg)
Reserved.set(*SubReg);
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/71795
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