================ @@ -508,6 +508,9 @@ def FeatureSMEI16I64 : SubtargetFeature<"sme-i16i64", "HasSMEI16I64", "true", def FeatureSMEF16F16 : SubtargetFeature<"sme-f16f16", "HasSMEF16F16", "true", "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)", []>; +def FeatureSMEFA64 : SubtargetFeature<"sme-fa64", "HasSMEFA64", "true", + "Enable the full A64 instruction set in SVE streaming mode (FEAT_SME_FA64)", [FeatureSVE2, FeatureNEON]>; ---------------- sdesmalen-arm wrote:
I'm not sure if we should imply these features, because `sme-fa64` will always be used in conjunction with SME. We could choose to implement this as a feature that does not actually enable/imply any other features, but instead just changes the behaviour when a function is run in streaming-SVE mode, in the sense that the compiler can use NEON/Full SVE instructions. https://github.com/llvm/llvm-project/pull/70809 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
