================
@@ -1798,11 +1798,24 @@ def ArmMveStrictPolymorphism : TypeAttr,
TargetSpecificAttr<TargetARM> {
let Documentation = [ArmMveStrictPolymorphismDocs];
}
-def NoUniqueAddress : InheritableAttr, TargetSpecificAttr<TargetItaniumCXXABI>
{
- let Spellings = [CXX11<"", "no_unique_address", 201803>];
+def NoUniqueAddress : InheritableAttr {
+ let Subjects = SubjectList<[NonBitField], ErrorDiag>;
+ // No spellings because instances of this attribute are created by
+ // MSNoUniqueAddress and ItaniumNoUniqueAddress
+ let Spellings = [];
+ let Documentation = [InternalOnly];
+}
+
+def MSNoUniqueAddress : InheritableAttr,
TargetSpecificAttr<TargetMicrosoftCXXABI> {
let Subjects = SubjectList<[NonBitField], ErrorDiag>;
+ let Spellings = [CXX11<"msvc", "no_unique_address", 201803>];
+ let Documentation = [MSNoUniqueAddressDocs];
+}
+
+def ItaniumNoUniqueAddress : InheritableAttr,
TargetSpecificAttr<TargetItaniumCXXABI> {
----------------
zygoloid wrote:
Perhaps the nicest thing would be to change the tablegen handler to support
marking individual spellings as target-specific, if that's easy to do.
https://github.com/llvm/llvm-project/pull/67199
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