[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'

Ben Shi via Phabricator via cfe-commits Fri, 28 Jul 2023 07:20:02 -0700

benshi001 updated this revision to Diff 545152.

Repository:
  rG LLVM Github Monorepo


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154588/new/

https://reviews.llvm.org/D154588

Files:
  llvm/lib/Target/CSKY/CSKYISelLowering.cpp
  llvm/lib/Target/CSKY/CSKYInstrInfo.td
  llvm/test/CodeGen/CSKY/intrinsic.ll


Index: llvm/test/CodeGen/CSKY/intrinsic.ll
===================================================================
--- llvm/test/CodeGen/CSKY/intrinsic.ll
+++ llvm/test/CodeGen/CSKY/intrinsic.ll
@@ -11,6 +11,17 @@
   ret i32 %nlz
 }
 
+define i32 @cttz(i32 %x) {
+; CHECK-LABEL: cttz:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    brev32 a0, a0
+; CHECK-NEXT:    ff1.32 a0, a0
+; CHECK-NEXT:    rts16
+entry:
+  %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1)
+  ret i32 %ntz
+}
+
 define i32 @bswap(i32 %x) {
 ; CHECK-LABEL: bswap:
 ; CHECK:       # %bb.0: # %entry
@@ -21,8 +32,19 @@
   ret i32 %revb32
 }
 
-define i32 @bitreverse(i32 %x) {
-; CHECK-LABEL: bitreverse:
+define i16 @bswap16(i16 %x) {
+; CHECK-LABEL: bswap16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    revb16 a0, a0
+; CHECK-NEXT:    lsri16 a0, a0, 16
+; CHECK-NEXT:    rts16
+entry:
+  %revb16 = call i16 @llvm.bswap.i16(i16 %x)
+  ret i16 %revb16
+}
+
+define i32 @bitreverse_32(i32 %x) {
+; CHECK-LABEL: bitreverse_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    brev32 a0, a0
 ; CHECK-NEXT:    rts16
@@ -31,6 +53,20 @@
   ret i32 %brev32
 }
 
+define i16 @bitreverse_16(i16 %x) {
+; CHECK-LABEL: bitreverse_16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    brev32 a0, a0
+; CHECK-NEXT:    lsri16 a0, a0, 16
+; CHECK-NEXT:    rts16
+entry:
+  %brev = call i16 @llvm.bitreverse.i16(i16 %x)
+  ret i16 %brev
+}
+
 declare i32 @llvm.bswap.i32(i32)
+declare i16 @llvm.bswap.i16(i16)
 declare i32 @llvm.ctlz.i32 (i32, i1)
+declare i32 @llvm.cttz.i32 (i32, i1)
 declare i32 @llvm.bitreverse.i32(i32)
+declare i16 @llvm.bitreverse.i16(i16)
Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td
===================================================================
--- llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -1429,6 +1429,7 @@
   let Predicates = [iHas2E3] in {
     def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>;
     def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>;
+    def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>;
   }
   def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>;
 }
Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp
===================================================================
--- llvm/lib/Target/CSKY/CSKYISelLowering.cpp
+++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp
@@ -59,7 +59,6 @@
   setOperationAction(ISD::UREM, MVT::i32, Expand);
   setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
   setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
-  setOperationAction(ISD::CTTZ, MVT::i32, Expand);
   setOperationAction(ISD::CTPOP, MVT::i32, Expand);
   setOperationAction(ISD::ROTR, MVT::i32, Expand);
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
@@ -103,6 +102,7 @@
   if (!Subtarget.has2E3()) {
     setOperationAction(ISD::ABS, MVT::i32, Expand);
     setOperationAction(ISD::BITREVERSE, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ, MVT::i32, Expand);
     setOperationAction(ISD::SDIV, MVT::i32, Expand);
     setOperationAction(ISD::UDIV, MVT::i32, Expand);
   }

Index: llvm/test/CodeGen/CSKY/intrinsic.ll
===================================================================
--- llvm/test/CodeGen/CSKY/intrinsic.ll
+++ llvm/test/CodeGen/CSKY/intrinsic.ll
@@ -11,6 +11,17 @@
   ret i32 %nlz
 }
 
+define i32 @cttz(i32 %x) {
+; CHECK-LABEL: cttz:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    brev32 a0, a0
+; CHECK-NEXT:    ff1.32 a0, a0
+; CHECK-NEXT:    rts16
+entry:
+  %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1)
+  ret i32 %ntz
+}
+
 define i32 @bswap(i32 %x) {
 ; CHECK-LABEL: bswap:
 ; CHECK:       # %bb.0: # %entry
@@ -21,8 +32,19 @@
   ret i32 %revb32
 }
 
-define i32 @bitreverse(i32 %x) {
-; CHECK-LABEL: bitreverse:
+define i16 @bswap16(i16 %x) {
+; CHECK-LABEL: bswap16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    revb16 a0, a0
+; CHECK-NEXT:    lsri16 a0, a0, 16
+; CHECK-NEXT:    rts16
+entry:
+  %revb16 = call i16 @llvm.bswap.i16(i16 %x)
+  ret i16 %revb16
+}
+
+define i32 @bitreverse_32(i32 %x) {
+; CHECK-LABEL: bitreverse_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    brev32 a0, a0
 ; CHECK-NEXT:    rts16
@@ -31,6 +53,20 @@
   ret i32 %brev32
 }
 
+define i16 @bitreverse_16(i16 %x) {
+; CHECK-LABEL: bitreverse_16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    brev32 a0, a0
+; CHECK-NEXT:    lsri16 a0, a0, 16
+; CHECK-NEXT:    rts16
+entry:
+  %brev = call i16 @llvm.bitreverse.i16(i16 %x)
+  ret i16 %brev
+}
+
 declare i32 @llvm.bswap.i32(i32)
+declare i16 @llvm.bswap.i16(i16)
 declare i32 @llvm.ctlz.i32 (i32, i1)
+declare i32 @llvm.cttz.i32 (i32, i1)
 declare i32 @llvm.bitreverse.i32(i32)
+declare i16 @llvm.bitreverse.i16(i16)
Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td
===================================================================
--- llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -1429,6 +1429,7 @@
   let Predicates = [iHas2E3] in {
     def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>;
     def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>;
+    def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>;
   }
   def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>;
 }
Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp
===================================================================
--- llvm/lib/Target/CSKY/CSKYISelLowering.cpp
+++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp
@@ -59,7 +59,6 @@
   setOperationAction(ISD::UREM, MVT::i32, Expand);
   setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
   setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
-  setOperationAction(ISD::CTTZ, MVT::i32, Expand);
   setOperationAction(ISD::CTPOP, MVT::i32, Expand);
   setOperationAction(ISD::ROTR, MVT::i32, Expand);
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
@@ -103,6 +102,7 @@
   if (!Subtarget.has2E3()) {
     setOperationAction(ISD::ABS, MVT::i32, Expand);
     setOperationAction(ISD::BITREVERSE, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ, MVT::i32, Expand);
     setOperationAction(ISD::SDIV, MVT::i32, Expand);
     setOperationAction(ISD::UDIV, MVT::i32, Expand);
   }

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[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'

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