xen0n added a comment. Thank you (and your team, and of course other friends) for all your work this cycle!
================ Comment at: llvm/docs/ReleaseNotes.rst:202-203 +* Adds assembler/disassembler support for the ``LSX``, ``LASX``, ``LVZ`` and + ``LBT`` ISA extensions. * The ``lp64s`` ABI is supported now and has been tested on Rust bare-matal target. ---------------- The ISA extension acronyms are not identifiers here, so no need to format as inline code? ================ Comment at: llvm/docs/ReleaseNotes.rst:207 this feature is enabled by default for generic 64-bit processors. +* Adds support for the ``large`` code model. +* Several codegen improvements are made. ---------------- I'd suggest mentioning the GCC equivalent, in case people wonder. (`-mcmodel=large` is unimplemented GCC-side AFAIK.) ================ Comment at: llvm/docs/ReleaseNotes.rst:208 +* Adds support for the ``large`` code model. +* Several codegen improvements are made. ---------------- "Assorted codegen improvements" sounds more attractive? ;-) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156195/new/ https://reviews.llvm.org/D156195 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
