rengolin added a subscriber: olista01. rengolin added inline comments.
================ Comment at: clang/include/clang/Driver/Options.td:3525 + "For AArch32: 'soft' uses a function call, or 'tpidrurw', 'tpidruro' or 'tpidrprw' use the three CP15 registers. 'cp15' is an alias for 'tpidruro'. " + "For AArch64: 'tpidr_el0', 'tpidr_el1', 'tpidr_el2', 'tpidr_el3' or 'tpidrro_el0' use the five system registers. 'elN' is an alias for 'tpidr_elN'.">; def mpure_code : Flag<["-"], "mpure-code">, Alias<mexecute_only>; // Alias for GCC compatibility ---------------- simon_tatham wrote: > rengolin wrote: > > From your comment: > > > > > "In AArch32, on the other hand, the _only_ thread register you can choose > > > (apart from 'none, use a function call') is the one that's read-only at > > > EL0." > > > > I inferred the current alias `el0` would map to the read-only version > > `tpidrro_el0`. > > > > Looking at the implementation below (`AArch64ExpandPseudoInsts.cpp`), `EL0` > > seems to be the default when choosing the thread pointer? > If you inferred that, then I was unclear, and should reword :-) > > `el0` is a name only accepted on AArch64, and maps to the AArch64 register > `tpidr_el0`. > > The only hardware option in AArch32 (before this commit) is called `cp15` > (unhelpfully, since all three regs are in CP15), and is an alias for > `tpidruro`, which is the AArch32 register that's readonly at EL0 and writable > at EL1 (and in fact aliases the bottom 32 bits of tpidrro_el0). > > Yes, the current defaults are different between AArch32 and 64 > (unsurprisingly, since no register is currently supported on both), but that > makes sense, since Linux also seems to do things differently. On AArch32 the > code generation uses TPIDRURO, which unprivileged code can read but not > write, and on AArch64 it uses TPIDR_EL0 which unprivileged code can overwrite > if it wants to. I don't know why the defaults are different, but I have no > plan to change them here! Right! The confusion was on my side on the overloaded `EL0` for both the register name in AArch64 and the processor state on both. I should have noticed the capitalisation difference. Now it makes sense, thanks! > I don't know why the defaults are different, but I have no plan to change > them here! Ack. First introduce functionality, then investigate why (on a separate patch). @olista01 might remember something... Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152433/new/ https://reviews.llvm.org/D152433 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
