Author: Craig Topper Date: 2023-05-18T13:25:28-07:00 New Revision: e8b15c4eb28d56e9dd1ad792c32c5158080ec639
URL: https://github.com/llvm/llvm-project/commit/e8b15c4eb28d56e9dd1ad792c32c5158080ec639 DIFF: https://github.com/llvm/llvm-project/commit/e8b15c4eb28d56e9dd1ad792c32c5158080ec639.diff LOG: [RISCV] Fix test that was still using __RISCV_RVV_VLEN_BITS. NFC This constant was renamed to __riscv_v_fixed_vlen during code review. I missed this in my search and replace. Added: Modified: clang/test/Sema/attr-riscv-rvv-vector-bits.c Removed: ################################################################################ diff --git a/clang/test/Sema/attr-riscv-rvv-vector-bits.c b/clang/test/Sema/attr-riscv-rvv-vector-bits.c index e23f490427de..846fec9e62e4 100644 --- a/clang/test/Sema/attr-riscv-rvv-vector-bits.c +++ b/clang/test/Sema/attr-riscv-rvv-vector-bits.c @@ -252,7 +252,7 @@ TEST_CALL(float64m1) // --------------------------------------------------------------------------// // Vector initialization -#if __RISCV_RVV_VLEN_BITS == 256 +#if __riscv_v_fixed_vlen == 256 typedef vint32m1_t int32x8 __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen))); typedef vfloat64m1_t float64x4 __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen))); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
