Author: Benjamin Kramer Date: 2022-12-04T18:36:41+01:00 New Revision: fcf4e360ba6b5f005d2c478ca79112be7a61dacb
URL: https://github.com/llvm/llvm-project/commit/fcf4e360ba6b5f005d2c478ca79112be7a61dacb DIFF: https://github.com/llvm/llvm-project/commit/fcf4e360ba6b5f005d2c478ca79112be7a61dacb.diff LOG: Iterate over StringMaps using structured bindings. NFCI. Added: Modified: clang/lib/Serialization/GlobalModuleIndex.cpp llvm/include/llvm/ProfileData/SampleProf.h llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h llvm/lib/CodeGen/CommandFlags.cpp llvm/lib/IR/AsmWriter.cpp llvm/lib/Target/TargetMachineC.cpp mlir/lib/Dialect/Transform/IR/TransformOps.cpp mlir/lib/ExecutionEngine/ExecutionEngine.cpp Removed: ################################################################################ diff --git a/clang/lib/Serialization/GlobalModuleIndex.cpp b/clang/lib/Serialization/GlobalModuleIndex.cpp index b2283c2b3987..568e207e6405 100644 --- a/clang/lib/Serialization/GlobalModuleIndex.cpp +++ b/clang/lib/Serialization/GlobalModuleIndex.cpp @@ -815,10 +815,8 @@ bool GlobalModuleIndexBuilder::writeIndex(llvm::BitstreamWriter &Stream) { IdentifierIndexWriterTrait Trait; // Populate the hash table. - for (InterestingIdentifierMap::iterator I = InterestingIdentifiers.begin(), - IEnd = InterestingIdentifiers.end(); - I != IEnd; ++I) { - Generator.insert(I->first(), I->second, Trait); + for (auto &[Identifier, IDs] : InterestingIdentifiers) { + Generator.insert(Identifier, IDs, Trait); } // Create the on-disk hash table in a buffer. diff --git a/llvm/include/llvm/ProfileData/SampleProf.h b/llvm/include/llvm/ProfileData/SampleProf.h index aa202e91e9e0..db101b7bc7a8 100644 --- a/llvm/include/llvm/ProfileData/SampleProf.h +++ b/llvm/include/llvm/ProfileData/SampleProf.h @@ -405,8 +405,8 @@ class SampleRecord { /// Sort call targets in descending order of call frequency. static const SortedCallTargetSet SortCallTargets(const CallTargetMap &Targets) { SortedCallTargetSet SortedTargets; - for (const auto &I : Targets) { - SortedTargets.emplace(I.first(), I.second); + for (const auto &[Target, Frequency] : Targets) { + SortedTargets.emplace(Target, Frequency); } return SortedTargets; } @@ -415,8 +415,8 @@ class SampleRecord { static const CallTargetMap adjustCallTargets(const CallTargetMap &Targets, float DistributionFactor) { CallTargetMap AdjustedTargets; - for (const auto &I : Targets) { - AdjustedTargets[I.first()] = I.second * DistributionFactor; + for (const auto &[Target, Frequency] : Targets) { + AdjustedTargets[Target] = Frequency * DistributionFactor; } return AdjustedTargets; } diff --git a/llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h b/llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h index c41871e33eaf..5e12fcfeae1b 100644 --- a/llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h +++ b/llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h @@ -159,9 +159,9 @@ class ProfiledCallGraph { addProfiledFunction(Samples.getFuncName()); for (const auto &Sample : Samples.getBodySamples()) { - for (const auto &Target : Sample.second.getCallTargets()) { - addProfiledFunction(Target.first()); - addProfiledCall(Samples.getFuncName(), Target.first(), Target.second); + for (const auto &[Target, Frequency] : Sample.second.getCallTargets()) { + addProfiledFunction(Target); + addProfiledCall(Samples.getFuncName(), Target, Frequency); } } diff --git a/llvm/lib/CodeGen/CommandFlags.cpp b/llvm/lib/CodeGen/CommandFlags.cpp index 68041f9ddef6..9ad7c350a959 100644 --- a/llvm/lib/CodeGen/CommandFlags.cpp +++ b/llvm/lib/CodeGen/CommandFlags.cpp @@ -592,8 +592,8 @@ std::string codegen::getFeaturesStr() { if (getMCPU() == "native") { StringMap<bool> HostFeatures; if (sys::getHostCPUFeatures(HostFeatures)) - for (auto &F : HostFeatures) - Features.AddFeature(F.first(), F.second); + for (const auto &[Feature, IsEnabled] : HostFeatures) + Features.AddFeature(Feature, IsEnabled); } for (auto const &MAttr : getMAttrs()) @@ -612,8 +612,8 @@ std::vector<std::string> codegen::getFeatureList() { if (getMCPU() == "native") { StringMap<bool> HostFeatures; if (sys::getHostCPUFeatures(HostFeatures)) - for (auto &F : HostFeatures) - Features.AddFeature(F.first(), F.second); + for (const auto &[Feature, IsEnabled] : HostFeatures) + Features.AddFeature(Feature, IsEnabled); } for (auto const &MAttr : getMAttrs()) diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp index e67970a17c8e..af80b47449e4 100644 --- a/llvm/lib/IR/AsmWriter.cpp +++ b/llvm/lib/IR/AsmWriter.cpp @@ -1059,8 +1059,8 @@ int SlotTracker::processIndex() { // assigned consecutively. Since the StringMap iteration order isn't // guaranteed, use a std::map to order by module ID before assigning slots. std::map<uint64_t, StringRef> ModuleIdToPathMap; - for (auto &ModPath : TheIndex->modulePaths()) - ModuleIdToPathMap[ModPath.second.first] = ModPath.first(); + for (auto &[ModPath, ModId] : TheIndex->modulePaths()) + ModuleIdToPathMap[ModId.first] = ModPath; for (auto &ModPair : ModuleIdToPathMap) CreateModulePathSlot(ModPair.second); @@ -2875,13 +2875,12 @@ void AssemblyWriter::printModuleSummaryIndex() { std::string RegularLTOModuleName = ModuleSummaryIndex::getRegularLTOModuleName(); moduleVec.resize(TheIndex->modulePaths().size()); - for (auto &ModPath : TheIndex->modulePaths()) - moduleVec[Machine.getModulePathSlot(ModPath.first())] = std::make_pair( + for (auto &[ModPath, ModId] : TheIndex->modulePaths()) + moduleVec[Machine.getModulePathSlot(ModPath)] = std::make_pair( // A module id of -1 is a special entry for a regular LTO module created // during the thin link. - ModPath.second.first == -1u ? RegularLTOModuleName - : (std::string)std::string(ModPath.first()), - ModPath.second.second); + ModId.first == -1u ? RegularLTOModuleName : std::string(ModPath), + ModId.second); unsigned i = 0; for (auto &ModPair : moduleVec) { diff --git a/llvm/lib/Target/TargetMachineC.cpp b/llvm/lib/Target/TargetMachineC.cpp index 534a39108af2..aa9c9d176db5 100644 --- a/llvm/lib/Target/TargetMachineC.cpp +++ b/llvm/lib/Target/TargetMachineC.cpp @@ -258,8 +258,8 @@ char *LLVMGetHostCPUFeatures(void) { StringMap<bool> HostFeatures; if (sys::getHostCPUFeatures(HostFeatures)) - for (auto &F : HostFeatures) - Features.AddFeature(F.first(), F.second); + for (const auto &[Feature, IsEnabled] : HostFeatures) + Features.AddFeature(Feature, IsEnabled); return strdup(Features.getString().c_str()); } diff --git a/mlir/lib/Dialect/Transform/IR/TransformOps.cpp b/mlir/lib/Dialect/Transform/IR/TransformOps.cpp index 98ab3f71f06a..f7f062156c05 100644 --- a/mlir/lib/Dialect/Transform/IR/TransformOps.cpp +++ b/mlir/lib/Dialect/Transform/IR/TransformOps.cpp @@ -88,8 +88,8 @@ LogicalResult PatternApplicatorExtension::findAllMatches( // also used by the following operations. auto *dialect = root->getContext()->getLoadedDialect<transform::TransformDialect>(); - for (const auto &pair : dialect->getPDLConstraintHooks()) - patternModule.registerConstraintFunction(pair.first(), pair.second); + for (const auto &[name, constraintFn] : dialect->getPDLConstraintHooks()) + patternModule.registerConstraintFunction(name, constraintFn); // Register a noop rewriter because PDL requires patterns to end with some // rewrite call. diff --git a/mlir/lib/ExecutionEngine/ExecutionEngine.cpp b/mlir/lib/ExecutionEngine/ExecutionEngine.cpp index dc53b3546578..10ce72a7a754 100644 --- a/mlir/lib/ExecutionEngine/ExecutionEngine.cpp +++ b/mlir/lib/ExecutionEngine/ExecutionEngine.cpp @@ -145,8 +145,8 @@ bool ExecutionEngine::setupTargetTriple(Module *llvmModule) { llvm::StringMap<bool> hostFeatures; if (llvm::sys::getHostCPUFeatures(hostFeatures)) - for (auto &f : hostFeatures) - features.AddFeature(f.first(), f.second); + for (const auto &[feature, isEnabled] : hostFeatures) + features.AddFeature(feature, isEnabled); std::unique_ptr<llvm::TargetMachine> machine(target->createTargetMachine( targetTriple, cpu, features.getString(), {}, {})); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
