dmgreen added inline comments.
================
Comment at: llvm/include/llvm/Support/AArch64TargetParser.h:79
+ AEK_SMEF16F16 = 1ULL << 47, // FEAT_SMEF16F16
+ AEK_CSSC = 1ULL << 49, // FEAT_CSSC
};
----------------
48!?
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:497
+def FeatureCSSC : SubtargetFeature<"cssc", "HasCSSC", "true",
+ "Enable Common Short Sequence Compression (CSSC) instructions">;
+
----------------
lenary wrote:
> Please use the full name in parens: FEAT_CSSC (we've done this upstream for
> most other architectural extensions).
>
>
Can you add (FEAT_SCCS) to this (if that is the correct name).
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:11725
+ : BaseTwoOperandRegReg<size, 0b0, {0,1,1,0,?,?}, regtype, asm, OpNode>,
+ Sched<[]> {
+ let Inst{11} = isMin;
----------------
Can we make this WriteI, maybe. I think that would probably be the closest
sched class.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138488/new/
https://reviews.llvm.org/D138488
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
